dblp.uni-trier.dewww.uni-trier.de

Robert B. Reese

List of publications from the DBLP Bibliography Server - FAQ
Coauthor Index - Ask others: ACM DL/Guide - CiteSeer - CSB - Google - MSN - Yahoo

2005
12EERobert B. Reese, Mitchell A. Thornton, Cherrice Traver: A Coarse-Grain Phased Logic CPU. IEEE Trans. Computers 54(7): 788-799 (2005)
11EERobert B. Reese, Mitchell A. Thornton, Cherrice Traver, David Hemmendinger: Early evaluation for performance enhancement in phased logic. IEEE Trans. on CAD of Integrated Circuits and Systems 24(4): 532-550 (2005)
2004
10EEKenneth Fazel, Lun Li, Mitchell A. Thornton, Robert B. Reese, Cherrice Traver: Performance enhancement in phased logic circuits using automatic slack-matching buffer insertion. ACM Great Lakes Symposium on VLSI 2004: 413-416
2003
9EERobert B. Reese, Mitchell A. Thornton, Cherrice Traver: A Coarse-Grain Phased Logic CPU. ASYNC 2003: 2-13
8EEKenneth Fazel, Mitchell A. Thornton, Robert B. Reese: PLFire: A Visualization Tool for Asynchronous Phased Logic Designs. DATE 2003: 11096-11097
7EERobert B. Reese, Mitchell A. Thornton, Cherrice Traver: A Fine-Grain Phased Logic CPU. ISVLSI 2003: 70-79
2002
6EEMitchell A. Thornton, Kenneth Fazel, Robert B. Reese, Cherrice Traver: Generalized Early Evaluation in Self-Timed Circuits. DATE 2002: 255-259
2001
5 Robert B. Reese, Mitchell A. Thornton, Cherrice Traver: Arithmetic Logic Circuits Using Self-Timed Bit Level Dataflow and Early Evaluation. ICCD 2001: 18-23
2000
4EEHemang Lavana, Franc Brglez, Robert B. Reese, Gangadhar Konduri, Anantha Chandrakasan: OpenDesign: An Open User-Configurable Project Environment for Collaborative Design and Execution on the Internet. ICCD 2000: 567-570
1999
3EEHemang Lavana, Franc Brglez, Robert B. Reese: User-configurable experimental design flows on the web: the ISCAS'99 experiments. ISCAS (6) 1999: 440-443
1997
2EEJ. Scott Calhoun, Vijay K. Madisetti, Robert B. Reese, Thomas Egolf: Developing and Distributing Component-Level VHDL Models. VLSI Signal Processing 15(1-2): 111-126 (1997)
1993
1 Richard Auletta, Robert B. Reese, Cherrice Traver: A Comparison of Synchronous and Asynchronous FSMD Designs. ICCD 1993: 178-182

Coauthor Index

1Richard Auletta [1]
2Franc Brglez [3] [4]
3J. Scott Calhoun [2]
4Anantha Chandrakasan (Anantha P. Chandrakasan) [4]
5Thomas Egolf [2]
6Kenneth Fazel [6] [8] [10]
7David Hemmendinger [11]
8Gangadhar Konduri [4]
9Hemang Lavana [3] [4]
10Lun Li [10]
11Vijay K. Madisetti [2]
12Mitchell A. Thornton (Mitchell Aaron Thornton) [5] [6] [7] [8] [9] [10] [11] [12]
13Cherrice Traver [1] [5] [6] [7] [9] [10] [11] [12]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)