Chuanjun Zhang

2008
24	EE	Chuanjun Zhang, Bing Xue: Two dimensional highly associative level-two cache design. ICCD 2008: 679-684
23	EE	Chuanjun Zhang: Reducing cache misses through programmable decoders. TACO 4(4): (2008)
2006
22	EE	Chuanjun Zhang: A Capacity Co-allocation Configurable Cache for Low Power Embedded Systems. ICCD 2006
21	EE	Chuanjun Zhang: A Low Power Highly Associative Cache for Embedded Systems. ICCD 2006
20	EE	Lingling Jin, Wei Wu, Jun Yang, Chuanjun Zhang, Youtao Zhang: Reduce Register Files Leakage Through Discharging Cells. ICCD 2006
19	EE	Chuanjun Zhang: Balanced Cache: Reducing Conflict Misses of Direct-Mapped Caches. ISCA 2006: 155-166
18	EE	Chuanjun Zhang: Balanced instruction cache: reducing conflict misses of direct-mapped caches through balanced subarray accesses. Computer Architecture Letters 5(1): 2-5 (2006)
2005
17	EE	Chuanjun Zhang: An efficient direct mapped instruction cache for application-specific embedded systems. CODES+ISSS 2005: 45-50
16	EE	Lingling Jin, Wei Wu, Jun Yang, Chuanjun Zhang, Youtao Zhang: Dynamic Co-allocation of Level One Caches. ICESS 2005: 373-385
15	EE	Chuanjun Zhang, Frank Vahid, Walid A. Najjar: A highly configurable cache for low energy embedded systems. ACM Trans. Embedded Comput. Syst. 4(2): 363-387 (2005)
14	EE	Chuanjun Zhang, Frank Vahid, Jun Yang, Walid A. Najjar: A way-halting cache for low-energy high-performance systems. TACO 2(1): 34-54 (2005)
2004
13	EE	Chuanjun Zhang, Frank Vahid, Roman L. Lysecky: A Self-Tuning Cache Architecture for Embedded Systems. DATE 2004: 142-147
12	EE	Chuanjun Zhang, Jun Yang, Frank Vahid: Low Static-Power Frequent-Value Data Caches. DATE 2004: 214-219
11	EE	Chuanjun Zhang, Frank Vahid: Using a Victim Buffer in an Application-Specific Memory Hierarchy. DATE 2004: 220-227
10	EE	Chuanjun Zhang, Frank Vahid, Jun Yang, Walid A. Najjar: A way-halting cache for low-energy high-performance systems. ISLPED 2004: 126-131
9	EE	Jun Yang, Rajiv Gupta, Chuanjun Zhang: Frequent value encoding for low power data buses. ACM Trans. Design Autom. Electr. Syst. 9(3): 354-384 (2004)
8	EE	Chuanjun Zhang, Frank Vahid, Roman L. Lysecky: A self-tuning cache architecture for embedded systems. ACM Trans. Embedded Comput. Syst. 3(2): 407-425 (2004)
2003
7	EE	Dinesh C. Suresh, Jun Yang, Chuanjun Zhang, Banit Agrawal, Walid A. Najjar: FV-MSB: A Scheme for Reducing Transition Activity on Data Buses. HiPC 2003: 44-54
6	EE	Chuanjun Zhang, Frank Vahid: Cache Configuration Exploration on Prototyping Platforms. IEEE International Workshop on Rapid System Prototyping 2003: 164-
5	EE	Chuanjun Zhang, Frank Vahid, Walid A. Najjar: A Highly-Configurable Cache Architecture for Embedded Systems. ISCA 2003: 136-146
4	EE	Chuanjun Zhang, Frank Vahid, Walid A. Najjar: Energy Benefits of a Configurable Line Size Cache for Embedded Systems. ISVLSI 2003: 87-91
3	EE	Chuanjun Zhang, Frank Vahid, Jun Yang, Walid A. Najjar: A Way-Halting Cache for Low-Energy High-Performance Systems. Computer Architecture Letters 2: (2003)
2	EE	Frank Vahid, Roman L. Lysecky, Chuanjun Zhang, Greg Stitt: Highly configurable platforms for embedded computing systems. Microelectronics Journal 34(11): 1025-1029 (2003)
2002
1	EE	Chuanjun Zhang, Frank Vahid: A power-configurable bus for embedded systems. ISCAS (5) 2002: 809-812

Coauthor Index

1	Banit Agrawal	[7]
2	Rajiv Gupta	[9]
3	Lingling Jin	[16] [20]
4	Roman L. Lysecky	[2] [8] [13]
5	Walid A. Najjar	[3] [4] [5] [7] [10] [14] [15]
6	Greg Stitt	[2]
7	Dinesh C. Suresh	[7]
8	Frank Vahid	[1] [2] [3] [4] [5] [6] [8] [10] [11] [12] [13] [14] [15]
9	Wei Wu	[16] [20]
10	Bing Xue	[24]
11	Jun Yang	[3] [7] [9] [10] [12] [14] [16] [20]
12	Youtao Zhang	[16] [20]

Colors in the list of coauthors