2008 |
34 | EE | Salvatore Pontarelli,
Gian-Carlo Cardarilli,
Marco Re,
Adelio Salsano:
A Novel Error Detection and Correction Technique for RNS Based FIR Filters.
DFT 2008: 436-444 |
33 | EE | Gian-Carlo Cardarilli,
Luca Di Nunzio,
Marco Re,
Alberto Nannarelli:
ADAPTO: full-adder based reconfigurable architecture for bit level operations.
ISCAS 2008: 3434-3437 |
2007 |
32 | EE | Salvatore Pontarelli,
Luca Sterpone,
Gian-Carlo Cardarilli,
Marco Re,
Matteo Sonza Reorda,
Adelio Salsano,
Massimo Violante:
Optimization of Self Checking FIR filters by means of Fault Injection Analysis.
DFT 2007: 96-104 |
31 | EE | Salvatore Pontarelli,
Luca Sterpone,
Gian-Carlo Cardarilli,
Marco Re,
Matteo Sonza Reorda,
Adelio Salsano,
Massimo Violante:
Self Checking Circuit Optimization by means of Fault Injection Analysis: A Case Study on Reed Solomon Decoders.
IOLTS 2007: 194-196 |
30 | EE | G. L. Bernocchi,
Gian-Carlo Cardarilli,
Andrea Del Re,
Alberto Nannarelli,
Marco Re:
Low-power adaptive filter based on RNS components.
ISCAS 2007: 3211-3214 |
29 | EE | Gian-Carlo Cardarilli,
Salvatore Pontarelli,
Marco Re,
Adelio Salsano:
Analysis of Errors and Erasures in Parity Sharing RS Codecs.
IEEE Trans. Computers 56(12): 1721-1726 (2007) |
28 | EE | Gian-Carlo Cardarilli,
Salvatore Pontarelli,
Marco Re,
Adelio Salsano:
Concurrent Error Detection in Reed-Solomon Encoders and Decoders.
IEEE Trans. VLSI Syst. 15(7): 842-846 (2007) |
2006 |
27 | EE | Gian-Carlo Cardarilli,
Marco Ottavi,
Salvatore Pontarelli,
Marco Re,
Adelio Salsano:
Localization of Faults in Radix-n Signed Digit Adders.
IOLTS 2006: 178-180 |
26 | EE | Gian-Carlo Cardarilli,
Salvatore Pontarelli,
Marco Re,
Adelio Salsano:
Concurrent error detection in Reed Solomon decoders.
ISCAS 2006 |
25 | EE | Gian-Carlo Cardarilli,
Salvatore Pontarelli,
Marco Re,
Adelio Salsano:
Fault tolerant design of signed digit based FIR filters.
ISCAS 2006 |
24 | EE | Gian-Carlo Cardarilli,
Andrea Del Re,
Marco Re,
L. Simone:
Optimized QPSK modulator for DVB-S applications.
ISCAS 2006 |
23 | EE | Gian-Carlo Cardarilli,
Marco Ottavi,
Salvatore Pontarelli,
Marco Re,
Adelio Salsano:
Fault Localization, Error Correction, and Graceful Degradation in Radix 2 Signed Digit-Based Adders.
IEEE Trans. Computers 55(5): 534-540 (2006) |
2005 |
22 | EE | Gian-Carlo Cardarilli,
Salvatore Pontarelli,
Marco Re,
Adelio Salsano:
A Self Checking Reed Solomon Encoder: Design and Analysis.
DFT 2005: 111-119 |
21 | EE | Gian-Carlo Cardarilli,
Salvatore Pontarelli,
Marco Re,
Adelio Salsano:
FPGA oriented design of parity sharing RS codecs.
DFT 2005: 259-265 |
20 | EE | Gian-Carlo Cardarilli,
Salvatore Pontarelli,
Marco Re,
Adelio Salsano:
Design of a Self Checking Reed Solomon Encoder.
IOLTS 2005: 201-202 |
19 | EE | Gian-Carlo Cardarilli,
Andrea Del Re,
Alberto Nannarelli,
Marco Re:
Programmable power-of-two RNS scaler and its application to a QRNS polyphase filter.
ISCAS (2) 2005: 1102-1105 |
18 | EE | Gian-Carlo Cardarilli,
Fabrizio Lombardi,
Marco Ottavi,
Salvatore Pontarelli,
Marco Re,
Adelio Salsano:
A Comparative Evaluation of Designs for Reliable Memory Systems.
J. Electronic Testing 21(4): 429-444 (2005) |
2004 |
17 | EE | Andrea Del Re,
Alberto Nannarelli,
Marco Re:
A Tool for Automatic Generation of RTL-Level VHDL Description of RNS FIR Filters.
DATE 2004: 686-687 |
16 | EE | Gian-Carlo Cardarilli,
Marco Ottavi,
Salvatore Pontarelli,
Marco Re,
Adelio Salsano:
Data Integrity Evaluations of Reed Solomon Codes for Storage Systems.
DFT 2004: 158-164 |
15 | EE | Gian-Carlo Cardarilli,
Marco Ottavi,
Salvatore Pontarelli,
Marco Re,
Adelio Salsano:
A Signed Digit Adder with Error Correction and Graceful Degradation Capabilities.
IOLTS 2004: 141-148 |
14 | | Gian-Carlo Cardarilli,
Andrea Del Re,
Alberto Nannarelli,
Marco Re:
Low-power implementation of polyphase filters in Quadratic Residue Number system.
ISCAS (2) 2004: 725-728 |
2003 |
13 | EE | Gian-Carlo Cardarilli,
Marco Ottavi,
Salvatore Pontarelli,
Marco Re,
Adelio Salsano:
Error Detection in Signed Digit Arithmetic Circuit with Parity Checker.
DFT 2003: 401-408 |
12 | EE | Gian-Carlo Cardarilli,
Andrea Del Re,
Marco Re:
IP based reconfigurable digital platform for satellite communications.
ISCAS (2) 2003: 37-40 |
11 | EE | Alberto Nannarelli,
Gian-Carlo Cardarilli,
Marco Re:
Power-delay tradeoffs in residue number system.
ISCAS (5) 2003: 413-416 |
10 | EE | Gian-Carlo Cardarilli,
Marco Ottavi,
Salvatore Pontarelli,
Marco Re,
Adelio Salsano:
A fault tolerant hardware based file system manager for solid state mass memory.
ISCAS (5) 2003: 649-652 |
9 | EE | Gian-Carlo Cardarilli,
A. Leandri,
P. Marinucci,
Marco Ottavi,
Salvatore Pontarelli,
Marco Re,
Adelio Salsano:
Design of a fault tolerant solid state mass memory.
IEEE Transactions on Reliability 52(4): 476-491 (2003) |
2002 |
8 | EE | Salvatore Pontarelli,
Gian-Carlo Cardarilli,
A. Leandri,
Marco Ottavi,
Marco Re,
Adelio Salsano:
A self-checking cell logic block for fault tolerant FPGAs.
ISCAS (4) 2002: 477-480 |
7 | EE | Gian-Carlo Cardarilli,
Andrea Del Re,
Alberto Nannarelli,
Marco Re:
Power characterization of digital filters implemented on FPGA.
ISCAS (5) 2002: 801-804 |
2001 |
6 | EE | Marco Ottavi,
Gian-Carlo Cardarilli,
D. Cellitti,
Salvatore Pontarelli,
Marco Re,
Adelio Salsano:
Design of a Totally Self Checking Signature Analysis Checker for Finite State Machines.
DFT 2001: 403-411 |
5 | EE | Salvatore Pontarelli,
Gian-Carlo Cardarilli,
A. Malvoni,
Marco Ottavi,
Marco Re,
Adelio Salsano:
System-on-Chip Oriented Fault-Tolerant Sequential Systems Implementation Methodology.
DFT 2001: 455-460 |
4 | EE | Alberto Nannarelli,
Marco Re,
Gian-Carlo Cardarilli:
Tradeoffs between residue number system and traditional FIR filters.
ISCAS (2) 2001: 305-308 |
3 | EE | Marco Re,
Alberto Nannarelli,
Gian-Carlo Cardarilli,
Roberto Lojacono:
FPGA realization of RNS to binary signed conversion architecture.
ISCAS (4) 2001: 350-353 |
1999 |
2 | EE | Alberto L. Sangiovanni-Vincentelli,
Marco Re,
Luciano Lavagno,
Gian-Carlo Cardarilli,
Roberto Lojacono:
Analysis of the quantization noise effects on the SQNR behaviour in analog to digital conversion.
ISCAS (2) 1999: 334-338 |
1998 |
1 | EE | Gian-Carlo Cardarilli,
Marco Re,
Roberto Lojacono:
VLSI implementation of a real time fuzzy processor.
Journal of Intelligent and Fuzzy Systems 6(3): 389-401 (1998) |