| 2008 |
|---|
| 7 | EE | Osnat Keren,
Ilya Levin,
Vladimir Ostrovsky,
Beni Abramov:
Arbitrary Error Detection in Combinational Circuits by Using Partitioning.
DFT 2008: 361-369 |
| 2007 |
|---|
| 6 | EE | Ilya Levin,
Benjamin Abramov,
Vladimir Ostrovsky:
Reduction of Fault Latency in Sequential Circuits by using Decomposition.
DFT 2007: 261-271 |
| 2006 |
|---|
| 5 | EE | Ilya Levin,
Vladimir Ostrovsky,
Osnat Keren,
Vladimir Sinelnikov:
Cascade Scheme for Concurrent Errors Detection.
DSD 2006: 359-368 |
| 2005 |
|---|
| 4 | EE | Vladimir Ostrovsky,
Ilya Levin:
Implementation of Concurrent Checking Circuits by Independent Sub-circuits.
DFT 2005: 343-351 |
| 2003 |
|---|
| 3 | EE | Victor Varshavsky,
Ilya Levin,
Vladimir Ostrovsky:
Increasing Implementability of beta-driven Threshold Checkers.
IOLTS 2003: 158 |
| 2 | EE | A. Matrosova,
Vladimir Ostrovsky,
Ilya Levin,
K. Nikitin:
Designing FPGA based Self-Testing Checkers for m-out-of-n Codes.
IOLTS 2003: 49-53 |
| 2002 |
|---|
| 1 | EE | Ilya Levin,
Vladimir Ostrovsky,
Sergey Ostanin,
Mark G. Karpovsky:
Self-checking sequential circuits with self-healing ability.
ACM Great Lakes Symposium on VLSI 2002: 71-76 |
