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Ran Ginosar

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2009
50EEInna Vaisband, Ran Ginosar, Avinoam Kolodny, Eby G. Friedman: Power efficient tree-based crosslinks for skew reduction. ACM Great Lakes Symposium on VLSI 2009: 285-290
2008
49EERostislav (Reuven) Dobkin, Ran Ginosar: Fast Universal Synchronizers. PATMOS 2008: 199-208
48EEArkadiy Morgenshtein, Eby G. Friedman, Ran Ginosar, Avinoam Kolodny: Timing optimization in logic with interconnect. SLIP 2008: 19-26
47EERostislav (Reuven) Dobkin, Arkadiy Morgenshtein, Avinoam Kolodny, Ran Ginosar: Parallel vs. serial on-chip communication. SLIP 2008: 43-50
46EEA. Elyada, Ran Ginosar, U. Weiser: Low-Complexity Policies for Energy-Performance Tradeoff in Chip-Multi-Processors. IEEE Trans. VLSI Syst. 16(9): 1243-1248 (2008)
2007
45EERostislav (Reuven) Dobkin, Yevgeny Perelman, Tuvia Liran, Ran Ginosar, Avinoam Kolodny: High Rate Wave-pipelined Asynchronous On-chip Bit-serial Data Link. ASYNC 2007: 3-14
44EEEvgeny Bolotin, Israel Cidon, Ran Ginosar, Avinoam Kolodny: Routing table minimization for irregular mesh NoCs. DATE 2007: 942-947
43EEEvgeny Bolotin, Zvika Guz, Israel Cidon, Ran Ginosar, Avinoam Kolodny: The Power of Priority: NoC Based Distributed Cache Coherency. NOCS 2007: 117-126
42EEIsask'har Walter, Israel Cidon, Ran Ginosar, Avinoam Kolodny: Access Regulation to Hot-Modules in Wormhole NoCs. NOCS 2007: 137-148
41EERostislav (Reuven) Dobkin, Ran Ginosar, Israel Cidon: QNoC Asynchronous Router with Dynamic Virtual Channel Allocation. NOCS 2007: 218
40EERami Rom, Jacob Erel, Michael Glikson, Randy A. Lieberman, Kobi Rosenblum, Ofer Binah, Ran Ginosar, David L. Hayes: Adaptive Cardiac Resynchronization Therapy Device Based on Spiking Neurons Architecture and Reinforcement Learning Scheme. IEEE Transactions on Neural Networks 18(2): 542-550 (2007)
2006
39EERostislav (Reuven) Dobkin, Ran Ginosar, Avinoam Kolodny: Fast Asynchronous Shift Register for Bit-Serial Communication. ASYNC 2006: 117-127
38EEZvika Guz, Isask'har Walter, Evgeny Bolotin, Israel Cidon, Ran Ginosar, Avinoam Kolodny: Efficient link capacity and QoS design for network-on-chip. DATE 2006: 9-14
37EEUri Frank, Tsachy Kapschitz, Ran Ginosar: A predictive synchronizer for periodic clock domains. Formal Methods in System Design 28(2): 171-186 (2006)
36EERostislav (Reuven) Dobkin, Ran Ginosar, Christos P. Sotiriou: High Rate Data Synchronization in GALS SoCs. IEEE Trans. VLSI Syst. 14(10): 1063-1074 (2006)
35EEIlya Obridko, Ran Ginosar: Minimal Energy Asynchronous Dynamic Adders. IEEE Trans. VLSI Syst. 14(9): 1043-1047 (2006)
2005
34EERostislav (Reuven) Dobkin, Victoria Vishnyakov, Eyal Friedman, Ran Ginosar: An Asynchronous Router for Multiple Service Levels Networks on Chip. ASYNC 2005: 44-53
33EETsachy Kapschitz, Ran Ginosar: Formal Verification of Synchronizers. CHARME 2005: 359-362
32EEArkadiy Morgenshtein, Israel Cidon, Ran Ginosar, Avinoam Kolodny: Low-leakage repeaters for NoC interconnects. ISCAS (1) 2005: 600-603
31EEIlya Obridko, Ran Ginosar: Low energy asynchronous architectures. ISCAS (5) 2005: 5238-5241
30EERostislav (Reuven) Dobkin, Michael Peleg, Ran Ginosar: Parallel interleaver design and VLSI architecture for low-latency MAP turbo decoders. IEEE Trans. VLSI Syst. 13(4): 427-438 (2005)
2004
29EERostislav (Reuven) Dobkin, Ran Ginosar, Christos P. Sotiriou: Data Synchronization Issues in GALS SoCs. ASYNC 2004: 170-180
28EEAlex Branover, Rakefet Kol, Ran Ginosar: Asynchronous Design By Conversion: Converting Synchronous Circuits into Asynchronous Ones. DATE 2004: 870-877
27EEUri Frank, Ran Ginosar: A Predictive Synchronizer for Periodic Clock Domains. PATMOS 2004: 402-412
26EEArkadiy Morgenshtein, Michael Moreinis, Ran Ginosar: Asynchronous gate-diffusion-input (GDI) circuits. IEEE Trans. VLSI Syst. 12(8): 847-856 (2004)
25EEEvgeny Bolotin, Israel Cidon, Ran Ginosar, Avinoam Kolodny: Cost considerations in network on chip. Integration 38(1): 19-42 (2004)
24EEEvgeny Bolotin, Israel Cidon, Ran Ginosar, Avinoam Kolodny: QNoC: QoS architecture and design process for network on chip. Journal of Systems Architecture 50(2-3): 105-128 (2004)
2003
23EEYaron Semiat, Ran Ginosar: Timing Measurements of Synchronization Circuits. ASYNC 2003: 68-77
22EERan Ginosar: Fourteen Ways to Fool Your Synchronizer. ASYNC 2003: 89-97
21EEKen S. Stevens, Ran Ginosar, Shai Rotem: Relative timing [asynchronous design]. IEEE Trans. VLSI Syst. 11(1): 129-140 (2003)
20EEY. Elboim, Avinoam Kolodny, Ran Ginosar: A clock-tuning circuit for system-on-chip. IEEE Trans. VLSI Syst. 11(4): 616-626 (2003)
1999
19EEKen S. Stevens, Shai Rotem, Ran Ginosar: Relative Timing. ASYNC 1999: 208-218
18EEShai Rotem, Ken S. Stevens, Charles Dike, Marly Roncken, Boris Agapiev, Ran Ginosar, Rakefet Kol, Peter A. Beerel, Chris J. Myers, Kenneth Y. Yun: RAPPID: An Asynchronous Instruction Length Decoder. ASYNC 1999: 60-70
17EEKen S. Stevens, Shai Rotem, Steven M. Burns, Jordi Cortadella, Ran Ginosar, Michael Kishinevsky, Marly Roncken: CAD Directions for High Performance Asynchronous Circuits. DAC 1999: 116-121
1998
16EEWei-Chun Chou, Peter A. Beerel, Ran Ginosar, Rakefet Kol, Chris J. Myers, Shai Rotem, Ken S. Stevens, Kenneth Y. Yun: Average-Case Optimized Technology Mapping of One-Hot Domino CircuitsAverage-Case Optimized Transistor-Level Technology Mapping of Extended Burst-Mode Circuits. ASYNC 1998: 80-
15EEUzi Zangi, Ran Ginosar: A low power video processor. ISLPED 1998: 136-138
14EERakefet Kol, Ran Ginosar: Kin: A High Performance Asynchronous Processor Architecture. International Conference on Supercomputing 1998: 433-440
1997
13 Rakefet Kol, Ran Ginosar: A Double-Latched Asynchronous Pipeline. ICCD 1997: 706-712
1995
12EEIlana David, Ran Ginosar, Michael Yoeli: Self-timed is self-checking. J. Electronic Testing 6(2): 219-228 (1995)
1993
11 Ilana David, Ran Ginosar, Michael Yoeli: Self-Timed Architecture of a Reduced Instruction Set Computer. Asynchronous Design Methodologies 1993: 29-43
10EEAlan Rotman, Ran Ginosar: Control unit synthesis from a high-level language. IEEE Trans. on CAD of Integrated Circuits and Systems 12(1): 162-167 (1993)
1992
9 Ilana David, Ran Ginosar, Michael Yoeli: Implementing Sequential Machines as Self-Timed Circuits. IEEE Trans. Computers 41(1): 12-17 (1992)
8 Ilana David, Ran Ginosar, Michael Yoeli: An Efficient Implementation of Boolean Functions as Self-Timed Circuits. IEEE Trans. Computers 41(1): 2-11 (1992)
1991
7 Arie Harsat, Ran Ginosar: CARMEL-4: The Unify-Spawn Machine for FCP. ICLP 1991: 840-854
1990
6 Arie Harsat, Ran Ginosar: An Extended RISC Methodology and its Application to FCP. ICLP 1990: 67-82
1988
5 Arie Harsat, Ran Ginosar: CARMEL-2: A Second Generation VLSI Architecture for Flat Concurrent Prolog. FGCS 1988: 962-969
1985
4 Ran Ginosar, Dwight D. Hill: Design and Implementation of Switching Systems for Parallel Processors. ICPP 1985: 674-680
1982
3 Bruce W. Arden, Ran Ginosar: MP/C: A Multiprocessor/Computer Architecture. IEEE Trans. Computers 31(5): 455-473 (1982)
1981
2 Bruce W. Arden, Ran Ginosar: A Single-Relation Module for a Data Base Machine. ISCA 1981: 227-238
1 Bruce W. Arden, Ran Ginosar: MP/C: A Multiprocessor/Computer Architecture. ISCA 1981: 3-20

Coauthor Index

1Boris Agapiev [18]
2Bruce W. Arden [1] [2] [3]
3Peter A. Beerel [16] [18]
4Ofer Binah [40]
5Evgeny Bolotin [24] [25] [38] [43] [44]
6Alex Branover [28]
7Steven M. Burns [17]
8Wei-Chun Chou [16]
9Israel Cidon [24] [25] [32] [38] [41] [42] [43] [44]
10Jordi Cortadella [17]
11Ilana David [8] [9] [11] [12]
12Charles Dike [18]
13Rostislav (Reuven) Dobkin [29] [30] [34] [36] [39] [41] [45] [47] [49]
14Y. Elboim [20]
15A. Elyada [46]
16Jacob Erel [40]
17Uri Frank [27] [37]
18Eby G. Friedman [48] [50]
19Eyal Friedman [34]
20Michael Glikson [40]
21Zvika Guz [38] [43]
22Arie Harsat [5] [6] [7]
23David L. Hayes [40]
24Dwight D. Hill [4]
25Tsachy Kapschitz [33] [37]
26Michael Kishinevsky [17]
27Rakefet Kol [13] [14] [16] [18] [28]
28Avinoam Kolodny [20] [24] [25] [32] [38] [39] [42] [43] [44] [45] [47] [48] [50]
29Randy A. Lieberman [40]
30Tuvia Liran [45]
31Michael Moreinis [26]
32Arkadiy Morgenshtein [26] [32] [47] [48]
33Chris J. Myers [16] [18]
34Ilya Obridko [31] [35]
35Michael Peleg [30]
36Yevgeny Perelman [45]
37Rami Rom [40]
38Marly Roncken [17] [18]
39Kobi Rosenblum [40]
40Shai Rotem [16] [17] [18] [19] [21]
41Alan Rotman [10]
42Yaron Semiat [23]
43Christos P. Sotiriou [29] [36]
44Ken S. Stevens [16] [17] [18] [19] [21]
45Inna Vaisband [50]
46Victoria Vishnyakov [34]
47Isask'har Walter [38] [42]
48U. Weiser [46]
49Michael Yoeli [8] [9] [11] [12]
50Kenneth Y. Yun [16] [18]
51Uzi Zangi [15]

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Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)