3. ACSD 2003: Guimaraes, Portugal

3rd International Conference on Application of Concurrency to System Design (ACSD 2003), 18-20 June 2003, Guimaraes, Portugal. IEEE Computer Society 2003, ISBN 0-7695-1887-7 BibTeX

@proceedings{DBLP:conf/acsd/2003,
  title     = {3rd International Conference on Application of Concurrency to
               System Design (ACSD 2003), 18-20 June 2003, Guimaraes, Portugal},
  booktitle = {ACSD},
  publisher = {IEEE Computer Society},
  year      = {2003},
  isbn      = {0-7695-1887-7},
  bibsource = {DBLP, http://dblp.uni-trier.de}
}

Invited Papers

Grant Martin:
The Reality of System Design Today: Do Theory and Practice Meet? 3
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P. S. Thiagarajan:
Cyclic Communicating Processes: Hierarchy and Verification. 4
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Ian Oliver:
Model Driven Embedded Systems. 5
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Regular Papers

Jean-Pierre Talpin, Paul Le Guernic, Sandeep K. Shukla, Rajesh K. Gupta, Frederic Doucet:
Polychrony for Formal Refinement-Checking in a System-Level Design Methodology. 9-19
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Xi Chen, Harry Hsieh, Felice Balarin, Yosinori Watanabe:
Case Studies of Model Checking for Embedded System Designs. 20-28
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Jordi Cortadella, Alex Kondratyev, Luciano Lavagno, Yosinori Watanabe:
Quasi-Static Scheduling for Concurrent Architectures. 29-40
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Yves Bontemps, Pierre-Yves Schobbens:
Synthesis of Open Reactive Systems from Scenario-Based Specifications. 41-50
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Victor Khomenko, Maciej Koutny, Alexandre Yakovlev:
Detecting State Coding Conflicts in STG Unfoldings Using SAT. 51-60
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Javier Esparza:
A Polynomial-Time Algorithm for Checking Consistency of Free-Choice Signal Transition Graphs. 61-70
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Mohammad Reza Mousavi, Michel A. Reniers, Twan Basten, Michel R. V. Chaudron:
Separation of Concerns in the Formal Design of Real-Time Shared Data-Space Systems. 71-81
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Didier Buchs, Stanislav Chachkov, David Hurzeler:
Modelling a Secure, Mobile, and Transactional System with CO-OPN. 82-91
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Laure Petrucci, Jonathan Billington, Lars Michael Kristensen, Zahid H. Qureshi:
Developing a Formal Specification for the Mission System of a Maritime Surveillance Aircraft. 92-101
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Vincent Beaudenon, Emmanuelle Encrenaz, Jean Lou Desbarbieux:
Design Validation of ZCSP with SPIN. 102-110
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Paolo Ballarini, Lorenzo Capra, Giuliana Franceschinis, Massimiliano De Pierro:
Memory Fault Tolerance Software Mechanisms: Design and Configuration Support through SWN Models. 111-121
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Sotiris Moschoyiannis, Michael W. Shields:
Component-Based Design: Towards Guided Composition. 122-131
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Elisabeth Pelz, Hans Fleischhack:
Compositional High Level Petri Nets with Timing Constraints - A Comparison. 132-141
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Roberto Gorrieri, Fabio Martinelli, Marinella Petrocchi, Anna Vaccarelli:
Compositional Verification of Integrity for Digital Stream Signature Protocols. 142-149
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Henri Hansen, Heikki Virtanen, Antti Valmari:
Merging State-Based and Action-Based Verification. 150-156
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Abhik Roychoudhury, P. S. Thiagarajan:
Communicating Transaction Processes. 157-166
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Adrianna Alexander, Wolfgang Reisig:
Logic of Involved Variables - System Specification with Temporal Logic of Distributed Actions. 167-176
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João Paulo Barros, Luís Gomes:
Modifying Petri Net Models by Means of Crosscutting Operations. 177-186
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Tuomo Pyhälä, Keijo Heljanko:
Specification Coverage Aided Test Selection. 187-195
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Jaco van de Pol, Miguel Valero Espada:
Verification of JavaSpaces^TM Parallel Programs. 196-205
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Luís Gomes, Anikó Costa:
On Lifting of Statechart Structuring Mechanisms. 206-215
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Hermenegilda Macià, Valentín Valero Ruiz, Fernando Cuartero, Fernando L. Pelayo:
A New Synchronization in Finite Stochastic Petri Box Calculus. 216-
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Tool Presentations

Roman Jokl, Stanislav Racek:
C-Sim version 5.0. 229-230
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Jean-Louis Boulanger:
ABTOOLS: Another B Tool. 231-232
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Dag Björklund, Johan Lilius, Ivan Porres:
Rialto Profile in the SMW Toolkit. 233-234
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Boualem Benatallah, Piotr Chrzastowski-Wachtel, Rachid Hamadi, Milton O'Dell, Adi Susanto:
HiWorD: A Petri Net-Based Hierarchical Workflow Designer. 235-236
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Sander Stuijk, Twan Basten, Jan Ypma:
CAST - A Task-Level Concurrency Analysis Tool. 237-238
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Federico Crazzolara, Giuseppe Milicia:
A Framework for the Development of Protocols. 239-240
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Ammar Aljer, Philippe Devienne, Sophie Tison, Jean-Louis Boulanger, Georges Mariano:
BHDL: Circuit Design in B. 241-242
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Agnes Madalinski:
CONFRES: Interactive Coding Conflict Resolver Based on Core Visualisation. 243-244
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María-del-Mar Gallardo, Jesús Martínez, Pedro Merino, Ernesto Pimentel:
Abstract Model Checking and Refinement of Temporal Logic in aSPIN. 245-246
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Juan José Sánchez Penas, Thomas Arts:
VoDkaV Tool: Model Checking for Extracting Global Scheduler Properties from Local Restrictions. 247-248
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Jan Romberg, Jan Jürjens, Guido Wimmel, Oscar Slotosch, Gabor Hahn:
AutoFOCUS and the MoDe Tool. 249-250
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