2008 |
29 | EE | Ad M. G. Peeters,
Mark de Wit:
Asynchronous circuit design using Handshake Solutions.
SoCC 2008: 391-392 |
2007 |
28 | EE | Alexander Taubin,
Jordi Cortadella,
Luciano Lavagno,
Luciano Lavagno,
Alex Kondratyev,
Ad M. G. Peeters:
Design Automation of Real-Life Asynchronous Devices and Systems.
Foundations and Trends in Electronic Design Automation 2(1): 1-133 (2007) |
2006 |
27 | EE | Ad M. G. Peeters:
Clockless IC design using handshake technology.
ISPD 2006: 169 |
2005 |
26 | EE | Frank te Beest,
Ad M. G. Peeters:
A Multiplexor Based Test Method for Self-Timed Circuits.
ASYNC 2005: 166-175 |
25 | | Ad M. G. Peeters:
Handshake Technology: High Way to Low Power - Invited Talk.
CPA 2005: 401 |
2004 |
24 | EE | Ad M. G. Peeters:
Implementation of Handshake Components.
25 Years Communicating Sequential Processes 2004: 98-132 |
23 | EE | Ad M. G. Peeters:
Bringing Handshake Technology to the Open Market.
ASYNC 2004: 183 |
2003 |
22 | EE | Joep L. W. Kessels,
Ad M. G. Peeters,
Suk-Jin Kim:
Bridging Clock Domains by Synchronizing the Mice in the Mousetrap.
PATMOS 2003: 141-150 |
21 | EE | Frank te Beest,
Ad M. G. Peeters,
Kees van Berkel,
Hans G. Kerkhoff:
Synchronous Full-Scan for Asynchronous Handshake Circuits.
J. Electronic Testing 19(4): 397-406 (2003) |
20 | EE | Joep L. W. Kessels,
Ad M. G. Peeters,
Paul Wielage,
Suk-Jin Kim:
Clock synchronization through handshake signalling.
Microprocessors and Microsystems 27(9): 447-460 (2003) |
19 | EE | Kees van Berkel,
Ad M. G. Peeters,
Frank te Beest:
Adding synchronous and LSSD modes to asynchronous circuits.
Microprocessors and Microsystems 27(9): 461-471 (2003) |
2002 |
18 | EE | Frank te Beest,
Kees van Berkel,
Ad M. G. Peeters:
Adding Synchronous and LSSD Modes to Asynchronous Circuits.
ASYNC 2002: 161-170 |
17 | EE | Joep L. W. Kessels,
Suk-Jin Kim,
Ad M. G. Peeters,
Paul Wielage:
Clock Synchronization through Handshake Signalling.
ASYNC 2002: 59-68 |
16 | EE | Kees G. W. Goossens,
Paul Wielage,
Ad M. G. Peeters,
Jef L. van Meerbergen:
Networks on Silicon: Combining Best-Effort and Guaranteed Services.
DATE 2002: 423-427 |
15 | EE | Frank te Beest,
Ad M. G. Peeters,
Marc Verra,
Kees van Berkel,
Hans G. Kerkhoff:
Automatic Scan Insertion and Test Generation for Asynchronous Circuits.
ITC 2002: 804-813 |
14 | EE | Francesco Pessolano,
Joep L. W. Kessels,
Ad M. G. Peeters:
MDSP: A High-Performance Low-Power DSP Architecture.
PATMOS 2002: 35-44 |
2001 |
13 | EE | Joep L. W. Kessels,
Ad M. G. Peeters:
The tangram framework (embedded tutorial): asynchronous circuits for low power.
ASP-DAC 2001: 255-260 |
12 | EE | Joep L. W. Kessels,
Ad M. G. Peeters,
Torsten Kramer,
Markus Feuser,
Klaus Ully:
Designing an Asynchronous Bus Interface.
ASYNC 2001: 108-117 |
11 | EE | Ad M. G. Peeters,
Kees van Berkel:
Synchronous Handshake Circuits.
ASYNC 2001: 86-95 |
2000 |
10 | EE | Joep L. W. Kessels,
Gerrit den Besten,
Ad M. G. Peeters,
Torsten Kramer,
Volker Timm:
Applying Asynchronous Circuits in Contactless Smart Cards.
ASYNC 2000: 36-44 |
1998 |
9 | EE | Radu Negulescu,
Ad M. G. Peeters:
Verification of Speed-Dependences in Single-Rail Handshake Circuits.
ASYNC 1998: 159- |
8 | EE | Hans van Gageldonk,
Kees van Berkel,
Ad M. G. Peeters,
Daniel Baumann,
Daniel Gloor,
Gerhard Stegmann:
An Asynchronous Low-Power 80C51 Microcontroller.
ASYNC 1998: 96-107 |
1995 |
7 | EE | Ad M. G. Peeters,
Kees van Berkel:
Single-rail handshake circuits.
ASYNC 1995: 53-62 |
6 | EE | Kees van Berkel,
Ronan Burgess,
Joep L. W. Kessels,
Ad M. G. Peeters,
Marly Roncken,
Frits D. Schalij,
Rik van de Wiel:
A single-rail re-implementation of a DCC error detector using a generic standard-cell library.
ASYNC 1995: 72- |
5 | EE | Kees van Berkel,
Ferry Huberts,
Ad M. G. Peeters:
Stretching quasi delay insensitivity by means of extended isochronic forks.
ASYNC 1995: 99- |
1994 |
4 | EE | Kees van Berkel,
Ronan Burgess,
Joep L. W. Kessels,
Marly Roncken,
Frits D. Schalij,
Ad M. G. Peeters:
Asynchronous Circuits for Low Power: A DCC Error Corrector.
IEEE Design & Test of Computers 11(2): 22-32 (1994) |
1993 |
3 | | Jaco Haans,
Kees van Berkel,
Ad M. G. Peeters,
Frits D. Schalij:
Asynchronous Multipliers as Combinational Handshake Circuits.
Asynchronous Design Methodologies 1993: 149-163 |
2 | | Jo C. Ebergen,
Ad M. G. Peeters:
Design and Analysis of Delay-Insensitive Modulo-N Counters.
Formal Methods in System Design 3(3): 211-232 (1993) |
1992 |
1 | | Jo C. Ebergen,
Ad M. G. Peeters:
Modulo-N Counters: Design and Analysis of Delay-Insensitive Circuits.
Designing Correct Circuits 1992: 27-46 |