6. ASYNC 2000: Eilat, Israel

@proceedings{DBLP:conf/async/2000,
  title     = {6th International Symposium on Advanced Research in Asynchronous
               Circuits and Systems (ASYNC 2000), 2-6 April 2000, Eilat, Israel},
  booktitle = {ASYNC},
  publisher = {IEEE Computer Society},
  year      = {2000},
  isbn      = {0-7695-0586-4},
  bibsource = {DBLP, http://dblp.uni-trier.de}
}

Theory & Verification Techniques

• Marco A. Peña, Jordi Cortadella, Enric Pastor, Alex Kondratyev:
  Formal Verification of Safety Properties in Timed Circuits. 2-11
  Electronic Edition (link) BibTeX
• Willem C. Mallon:
  On Directed Transformations of Delay-Insensitive Specifications, Alternations and Dynamic Nondeterminism. 12-22
  Electronic Edition (link) BibTeX
• Igor Benko, Jo C. Ebergen:
  Composing Snippets. 23-
  Electronic Edition (link) BibTeX

Asynchronous Design in Embedded Systems

• Joep L. W. Kessels, Gerrit den Besten, Ad M. G. Peeters, Torsten Kramer, Volker Timm:
  Applying Asynchronous Circuits in Contactless Smart Cards. 36-44
  Electronic Edition (link) BibTeX
• George S. Taylor, Simon W. Moore, Steve Wilcox, Peter Robinson:
  An On-Chip Dynamically Recalibrated Delay Line for Embedded Self-Timed Systems. 45-51
  Electronic Edition (link) BibTeX
• Jens Muttersbach, Thomas Villiger, Wolfgang Fichtner:
  Practical Design of Globally-Asynchronous Locally-Synchronous Systems. 52-
  Electronic Edition (link) BibTeX

Testability

• Marly Roncken, Ken S. Stevens, Rajesh Pendurkar, Shai Rotem, Parimal Pal Chaudhuri:
  CA-BIST for Asynchronous Circuits: A Case Study on the RAPPID Asynchronous Instruction Length Decoder. 62-72
  Electronic Edition (link) BibTeX
• Philip P. Shirvani, Subhasish Mitra, Jo C. Ebergen, Marly Roncken:
  DUDES: A Fault Abstraction and Collapsing Framework for Asynchronous Circuits. 73-
  Electronic Edition (link) BibTeX

Synthesis

• Ivan Blunno, Luciano Lavagno:
  Automated Synthesis of Micro-Pipelines from Behavioral Verilog HDL. 84-92
  Electronic Edition (link) BibTeX
• Hans M. Jacobson, Erik Brunvand, Ganesh Gopalakrishnan, Prabhakar Kudva:
  High-Level Asynchronous System Design Using the ACK Framework. 93-103
  Electronic Edition (link) BibTeX
• Euiseok Kim, Jeong-Gun Lee, Dong-Ik Lee:
  Automatic Process-Oriented Control Circuit Generation for Asynchronous High-Level Synthesis. 104-113
  Electronic Edition (link) BibTeX
• Michiel M. Ligthart, Karl Fant, Ross Smith, Alexander Taubin, Alex Kondratyev: Asynchronous Design Using Commercial HDL Synthesis Tools. 114- BibTeX

Arbitration & Circuit Techniques

• Alexandre V. Bystrov, D. J. Kinniment, Alexandre Yakovlev:
  Priority Arbiters. 128-137
  Electronic Edition (link) BibTeX
• Charles E. Molnar, Ian W. Jones:
  Simple Circuits that Work for Complicated Reasons. 138-149
  Electronic Edition (link) BibTeX
• Fei Xia, Alexandre Yakovlev, Delong Shang, Alexandre V. Bystrov, Albert Koelmans, D. J. Kinniment:
  Asynchronous Communication Mechanisms Using Self-Timed Circuits. 150-
  Electronic Edition (link) BibTeX

Processor Design

• Jim D. Garside, W. J. Bainbridge, Andrew Bardsley, David M. Clark, David A. Edwards, Stephen B. Furber, David W. Lloyd, S. Mohammadi, J. S. Pepper, Steve Temple, J. V. Woods, Jianwei Liu, O. Petli:
  AMULET3i - An Asynchronous System-on-Chip. 162-175
  Electronic Edition (link) BibTeX
• Mike J. G. Lewis, L. E. M. Brackenbury:
  An Instruction Buffer for a Low-Power DSP. 176-
  Electronic Edition (link) BibTeX

Pushing the Performance Limit

• O. Hauck, A. Katoch, Sorin A. Huss:
  VLSI System Design Using Asynchronous Wave Pipelines: A 0.35?m CMOS 1.5 GHz Elliptic Curve Public Key Cryptosystem Chip. 188-
  Electronic Edition (link) BibTeX
• Montek Singh, Steven M. Nowick:
  High-Throughput Asynchronous Pipelines for Fine-Grain Dynamic Datapaths. 198-
  Electronic Edition (link) BibTeX
• Tiberiu Chelcea, Steven M. Nowick:
  Low-Latency Asynchronous FIFO's Using Token Rings. 210-
  Electronic Edition (link) BibTeX