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18. PATMOS 2008: Lisbon, Portugal

Lars Svensson, José Monteiro (Eds.): Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, 18th International Workshop, PATMOS 2008, Lisbon, Portugal, September 10-12, 2008. Revised Selected Papers. Lecture Notes in Computer Science 5349 Springer 2009, ISBN 978-3-540-95947-2 BibTeX

Low-Leakage and Subthreshold Circuits

Low-Power Methods and Models

Arithmetic and Memories

Variability and Statistical Timing

Synchronization and Interconnect

Power Supplies and Switching Noise

Low-Power Circuits; Reconfigurable Architectures

Poster Session 1: Circuits and Methods

Poster Session 2: Power and Delay Modeling

Power Optimizations Addressing Reconfigurable Architectures

Keynotes (Abstracts)

Copyright © Sat May 16 23:32:39 2009 by Michael Ley (ley@uni-trier.de)