| 2008 |
|---|
| 5 | EE | Maurice Keller,
William P. Marnane:
Energy Efficient Elliptic Curve Processor.
PATMOS 2008: 287-296 |
| 2007 |
|---|
| 4 | EE | Maurice Keller,
William P. Marnane:
Low Power Elliptic Curve Cryptography.
PATMOS 2007: 310-319 |
| 3 | EE | Maurice Keller,
Robert Ronan,
William P. Marnane,
Colin C. Murphy:
Hardware architectures for the Tate pairing over GF(2m).
Computers & Electrical Engineering 33(5-6): 392-406 (2007) |
| 2006 |
|---|
| 2 | EE | Maurice Keller,
Tim Kerins,
Francis M. Crowe,
William P. Marnane:
FPGA Implementation of a GF(2m) Tate Pairing Architecture.
ARC 2006: 358-369 |
| 2005 |
|---|
| 1 | | Maurice Keller,
Tim Kerins,
William P. Marnane:
FPGA Implementation of a GF(24M) Multiplier for use in Pairing Based Cryptosystems.
FPL 2005: 594-597 |
