dblp.uni-trier.dewww.uni-trier.de

Vassilis Paliouras

List of publications from the DBLP Bibliography Server - FAQ
Coauthor Index - Ask others: ACM DL/Guide - CiteSeer - CSB - Google - MSN - Yahoo

2008
26EEIoannis Kouretas, Charalambos Basetas, Vassilis Paliouras: Low-power logarithmic number system addition/subtraction and their impact on digital filters. ISCAS 2008: 692-695
25EEIoannis Kouretas, Vassilis Paliouras: Mixed Radix-2 and High-Radix RNS Bases for Low-Power Multiplication. PATMOS 2008: 93-102
2007
24EECharalambos Basetas, Ioannis Kouretas, Vassilis Paliouras: Low-Power Digital Filtering Based on the Logarithmic Number System. PATMOS 2007: 546-555
2006
23EETheodoros Giannopoulos, Vassilis Paliouras: A novel technique for low-power D/A conversion based on PAPR reduction. ISCAS 2006
22EETheodoros Giannopoulos, Vassilis Paliouras: Low-Power Maximum Magnitude Computation for PAPR Reduction in OFDM Transmitters. PATMOS 2006: 203-213
21EEJohan Vounckx, Vassilis Paliouras: Editorial. J. Low Power Electronics 2(1): (2006)
2005
20 Vassilis Paliouras, Johan Vounckx, Diederik Verkest: Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation, 15th International Workshop, PATMOS 2005, Leuven, Belgium, September 21-23, 2005, Proceedings Springer 2005
19EEPanagiotis D. Vouzis, Mark G. Arnold, Vassilis Paliouras: Using CLNS for FFTs in OFDM demodulation of UWB receivers. ISCAS (4) 2005: 3954-3957
18EETheodoros Giannopoulos, Vassilis Paliouras: Low-Power VLSI Architectures for OFDM Transmitters Based on PAPR Reduction. PATMOS 2005: 177-186
17EEKonstantina Karagianni, Vassilis Paliouras: Low-Power Aspects of Nonlinear Signal Processing. PATMOS 2005: 518-527
2004
16 Enrico Macii, Odysseas G. Koufopavlou, Vassilis Paliouras: Integrated Circuit and System Design, Power and Timing Modeling, Optimization and Simulation; 14th International Workshop, PATMOS 2004, Santorini, Greece, September 15-17, 2004, Proceedings Springer 2004
15EETheodoros Giannopoulos, Vassilis Paliouras: An efficient architecture for peak-to-average power ratio reduction in OFDM systems in the presence of pulse-shaping filtering. ISCAS (4) 2004: 85-88
14 Stamatis Krommydas, Vassilis Paliouras: An efficient memory compression scheme for 8 k FFT in a DVB-T receiver and the corresponding error model. ISCAS (4) 2004: 89-92
13EEPanagiotis D. Vouzis, Vassilis Paliouras: Optimal Logarithmic Representation in Terms of SNR Behavior. PATMOS 2004: 760-769
2003
12EEEleni Fotopoulou, Vassilis Paliouras, Thanos Stouraitis: A computational technique and a VLSI architecture for digital pulse shaping in OFDM modems. ISCAS (2) 2003: 125-128
11EEIoannis Kouretas, Vassilis Paliouras: High-radix redundant circuits for RNS modulo rn-1, rn, or rn+1. ISCAS (5) 2003: 229-232
2002
10EEVassilis Paliouras, Alexander Skavantzos, Thanos Stouraitis: Multi-voltage low power convolvers using the polynomial residue number system. ACM Great Lakes Symposium on VLSI 2002: 7-11
2001
9EEVassilis Paliouras, Thanos Stouraitis: Low-Power Properties of the Logarithmic Number System. IEEE Symposium on Computer Arithmetic 2001: 229-236
8EEVassilis Paliouras, Thanos Stouraitis: Signal activity and power consumption reduction using the logarithmic number system. ISCAS (2) 2001: 653-656
7EEKonstantina Karagianni, Vassilis Paliouras, George Diamantakos, Thanos Stouraitis: Operation-Saving VLSI Architectures for 3D Geometrical Transformations. IEEE Trans. Computers 50(6): 609-622 (2001)
2000
6EEVassilis Paliouras, Thanos Stouraitis: Logarithmic Number System for Low-Power Arithmetic. PATMOS 2000: 285-294
1999
5EEVassilis Paliouras, Thanos Stouraitis: Novel high-radix residue number system multipliers and adders. ISCAS (1) 1999: 451-454
1997
4EEVassilis Paliouras, Thanos Stouraitis: Area-time performance of VLSI FIR filter architectures based on residue arithmetic. EUROMICRO 1997: 576-583
1995
3 I. Orginos, Vassilis Paliouras, Thanos Stouraitis: A Novel Algorithm for Multi-Operand Logarithmic Number System Addition and Subtraction Using Polynominal Approximation. ISCAS 1995: 1992-1995
1994
2 Vassilis Paliouras, Thanos Stouraitis: Systematic Design of Multi-Modulus/Multi-Function Residue Number System Processors. ISCAS 1994: 79-82
1993
1 Vassilis Paliouras, Dimitrios Soudris, Thanos Stouraitis: Methodology for the Design of Signed-digit DSP Processors. ISCAS 1993: 1833-1836

Coauthor Index

1Mark G. Arnold [19]
2Charalambos Basetas [24] [26]
3George Diamantakos [7]
4Eleni Fotopoulou [12]
5Theodoros Giannopoulos [15] [18] [22] [23]
6Konstantina Karagianni [7] [17]
7Odysseas G. Koufopavlou [16]
8Ioannis Kouretas [11] [24] [25] [26]
9Stamatis Krommydas [14]
10Enrico Macii [16]
11I. Orginos [3]
12Alexander Skavantzos [10]
13Dimitrios Soudris (D. J. Soudris) [1]
14Thanos Stouraitis [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [12]
15Diederik Verkest [20]
16Johan Vounckx [20] [21]
17Panagiotis D. Vouzis [13] [19]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)