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Vojin G. Oklobdzija

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2008
57 Vijaykrishnan Narayanan, C. P. Ravikumar, Jörg Henkel, Ali Keshavarzi, Vojin G. Oklobdzija, Barry M. Pangrle: Proceedings of the 2008 International Symposium on Low Power Electronics and Design, 2008, Bangalore, India, August 11-13, 2008 ACM 2008
56EEChristophe Giacomotto, Mandeep Singh, Milena Vratonjic, Vojin G. Oklobdzija: Energy Efficiency of Power-Gating in Low-Power Clocked Storage Elements. PATMOS 2008: 268-276
55EEVojin G. Oklobdzija: Reduced Instruction Set Computing. Wiley Encyclopedia of Computer Science and Engineering 2008
2007
54EEMandeep Singh, Christophe Giacomotto, Bart R. Zeydel, Vojin G. Oklobdzija: Logic Style Comparison for Ultra Low Power Operation in 65nm Technology. PATMOS 2007: 181-190
2006
53EEBart R. Zeydel, Vojin G. Oklobdzija: Methodology for Energy-Efficient Digital Circuit Sizing: Important Issues and Design Limitations. PATMOS 2006: 127-136
52EEMilena Vratonjic, Bart R. Zeydel, Vojin G. Oklobdzija: Circuit Sizing and Supply-Voltage Selection for Low-Power Digital Circuit Design. PATMOS 2006: 148-156
51EEChristophe Giacomotto, Nikola Nedovic, Vojin G. Oklobdzija: Energy-Delay Space Analysis for Clocked Storage Elements Under Process Variations. PATMOS 2006: 360-369
50EEXiao Yan Yu, Robert K. Montoye, Kevin J. Nowka, Bart R. Zeydel, Vojin G. Oklobdzija: Circuit Design Style for Energy Efficiency: LSDL and Compound Domino. PATMOS 2006: 47-55
49EEHoang Q. Dao, Bart R. Zeydel, Vojin G. Oklobdzija: Energy optimization of pipelined digital systems using circuit sizing and supply scaling. IEEE Trans. VLSI Syst. 14(2): 122-134 (2006)
2005
48 Vojin G. Oklobdzija: Proceedings of the Third IASTED International Conference on Circuits, Signals, and Systems, Marina del Rey, CA, USA, October 24-26, 2005 IASTED/ACTA Press 2005
47EEHoang Q. Dao, Bart R. Zeydel, Vojin G. Oklobdzija: Architectural Considerations for Energy Efficiency. ICCD 2005: 13-16
46EEMilena Vratonjic, Bart R. Zeydel, Vojin G. Oklobdzija: Low- and Ultra Low-Power Arithmetic Units: Design and Comparison. ICCD 2005: 249-252
45EEBart R. Zeydel, Theo T. J. H. Kluter, Vojin G. Oklobdzija: Efficient Mapping of Addition Recurrence Algorithms in CMOS. IEEE Symposium on Computer Arithmetic 2005: 107-113
44EEMarko Aleksic, Nikola Nedovic, K. Wayne Current, Vojin G. Oklobdzija: A New Model for Timing Jitter Caused by Device Noise in Current-Mode Logic Frequency Dividers. PATMOS 2005: 724-732
43EENikola Nedovic, Vojin G. Oklobdzija: Dual-edge triggered storage elements and clocking strategy for low-power systems. IEEE Trans. VLSI Syst. 13(5): 577-590 (2005)
42EEVojin G. Oklobdzija, Bart R. Zeydel, Hoang Q. Dao, Sanu Mathew, Ram Krishnamurthy: Comparison of high-performance VLSI adders in the energy-delay space. IEEE Trans. VLSI Syst. 13(6): 754-758 (2005)
2003
41EEVojin G. Oklobdzija, Bart R. Zeydel, Hoang Q. Dao, Sanu Mathew, Ram Krishnamurthy: Energy-Delay Estimation Technique for High-Performance Microprocessor VLSI Adders. IEEE Symposium on Computer Arithmetic 2003: 272-279
40EEVojin G. Oklobdzija, Ram Krishnamurthy: Tutorial: Design of Power Efficient VLSI Arithmetic: Speed and Power Trade-Offs. IEEE Symposium on Computer Arithmetic 2003: 280
39EEAamir A. Farooqui, Vojin G. Oklobdzija, Sadiq M. Sait: Area-time optimal adder with relative placement generator. ISCAS (5) 2003: 141-144
38EEXiao Yan Yu, Vojin G. Oklobdzija, William W. Walker: An efficient transistor optimizer for custom circuits. ISCAS (5) 2003: 197-200
37EEHoang Q. Dao, Bart R. Zeydel, Vojin G. Oklobdzija: Energy Optimization of High-Performance Circuits. PATMOS 2003: 399-408
36EEVojin G. Oklobdzija: Clocking and clocked storage elements in a multi-gigahertz environment. IBM Journal of Research and Development 47(5-6): 567-584 (2003)
2002
35EENikola Nedovic, Marko Aleksic, Vojin G. Oklobdzija: Comparative analysis of double-edge versus single-edge triggered clocked storage elements. ISCAS (5) 2002: 105-108
34EEVojin G. Oklobdzija, Jens Sparsø: Future directions in clocking multi-ghz systems. ISLPED 2002: 219
33EENikola Nedovic, Marko Aleksic, Vojin G. Oklobdzija: Conditional pre-charge techniques for power-efficient dual-edge clocking. ISLPED 2002: 56-59
32EEMartin Saint-Laurent, Vojin G. Oklobdzija, Simon S. Singh, Madhavan Swaminathan: Optimal Sequencing Energy Allocation for CMOS Integrated Systems. ISQED 2002: 194-199
31EEVojin G. Oklobdzija: Clocking and Clocked Storage Elements in Multi-GHz Environment. PATMOS 2002: 128-145
30EEHoang Q. Dao, Vojin G. Oklobdzija: Performance Comparison of VLSI Adders Using Logical Effort. PATMOS 2002: 25-34
2001
29 Nikola Nedovic, Marko Aleksic, Vojin G. Oklobdzija: Timing Characterization of Dual-edge Triggered Flip-flops. ICCD 2001: 538-541
28EEHoang Q. Dao, Kevin J. Nowka, Vojin G. Oklobdzija: Analysis of clocked timing elements for dynamic voltage scaling effects over process parameter variation. ISLPED 2001: 56-59
2000
27EENikola Nedovic, Vojin G. Oklobdzija: Dynamic Flip-Flop with Improved Power. ICCD 2000: 323-
26EEDragan Maksimovic, Vojin G. Oklobdzija, Borivoje Nikolic, K. Wayne Current: Clocked CMOS adiabatic logic with integrated single-phase power-clock supply. IEEE Trans. VLSI Syst. 8(4): 460-463 (2000)
1999
25EEAamir A. Farooqui, Vojin G. Oklobdzija: VLSI Implementation of Early Branch Prediction Circuits for High Performance Computing. Great Lakes Symposium on VLSI 1999: 30-33
1998
24EEVladimir Stojanovic, Vojin G. Oklobdzija, Raminder Singh Bajwa: A unified approach in the analysis of latches and flip-flops for low-power systems. ISLPED 1998: 227-232
23 Paul F. Stelling, Charles U. Martel, Vojin G. Oklobdzija, R. Ravi: Optimal Circuits for Parallel Multipliers. IEEE Trans. Computers 47(3): 273-285 (1998)
1997
22EEPaul F. Stelling, Vojin G. Oklobdzija: Implementing Multiply-Accumulate Operation in Multiplication Time. IEEE Symposium on Computer Arithmetic 1997: 99-
21EEDragan Maksimovic, Vojin G. Oklobdzija, Borivoje Nikolic, K. Wayne Current: Clocked CMOS adiabatic logic with integrated single-phase power-clock supply: experimental results. ISLPED 1997: 323-327
1996
20EEK. Wayne Current, Vojin G. Oklobdzija, Dragan Maksimovic: Low-Energy Logic Circuit Techniques for Multiple-Valued Logic. ISMVL 1996: 86-
19 Vojin G. Oklobdzija, David Villeger, Simon S. Liu: A Method for Speed Optimized Partial Product Reduction and Generation of Fast Parallel Multipliers Using an Algorithmic Approach. IEEE Trans. Computers 45(3): 294-306 (1996)
18EEVojin G. Oklobdzija, Belle Wei: Guest editors' introduction. VLSI Signal Processing 14(3): 239-240 (1996)
17EERichard H. Strandberg, Luis G. Bustamante, Vojin G. Oklobdzija, Michael A. Soderstrand, Jean-Claude Duc: Efficient realizations of squaring circuit and reciprocal used in adaptive sample rate notch filters. VLSI Signal Processing 14(3): 303-309 (1996)
16EEPaul F. Stelling, Vojin G. Oklobdzija: Design strategies for optimal hybrid final adders in a parallel multiplier. VLSI Signal Processing 14(3): 321-331 (1996)
1995
15EECharles U. Martel, Vojin G. Oklobdzija, R. Ravi, Paul F. Stelling: Design Strategies for Optimal Multiplier Circuits. IEEE Symposium on Computer Arithmetic 1995: 42-49
14EEK. J. Runge, L. P. Lee, J. Correa, R. T. Scalettar, Vojin G. Oklobdzija: Monte Carlo and molecular dynamics simulations using p4. IPPS 1995: 53-59
13EEVojin G. Oklobdzija, David Villeger: Improving multiplier design by using improved column compression tree and optimized final adder in CMOS technology. IEEE Trans. VLSI Syst. 3(2): 292-301 (1995)
12EER. T. Scalettar, K. J. Runge, J. Correa, P. Lee, Vojin G. Oklobdzija, J. L. Vujic: Simulations of Interacting Many Body Systems Using P4. International Journal of High Speed Computing 7(3): 327-349 (1995)
11EEMikhail N. Dorojevets, Vojin G. Oklobdzija: Multithreaded Decoupled Architecture. International Journal of High Speed Computing 7(3): 465-480 (1995)
1994
10 Vojin G. Oklobdzija: High-Performance Computer Arithmetic and Implementations: Introduction. HICSS (1) 1994: 280-281
9 Rupinder Hundal, Vojin G. Oklobdzija: Determination of Optimal Sizes for a First and Second Level SRAM-DRAM On-Chip Cache Combination. ICCD 1994: 60-64
8EEVojin G. Oklobdzija: An algorithmic and novel design of a leading zero detector circuit: comparison with logic synthesis. IEEE Trans. VLSI Syst. 2(1): 124-128 (1994)
7EEVojin G. Oklobdzija, David Villeger, Thierry Soulas: An integrated multiplier for complex numbers. VLSI Signal Processing 7(3): 213-222 (1994)
1992
6 Pak K. Chan, Martine D. F. Schlag, Clark D. Thomborson, Vojin G. Oklobdzija: Delay Optimization of Carry-Skip Adders and Block Carry-Lookahead Adders Using Multidimensional Dynamic Programming. IEEE Trans. Computers 41(8): 920-930 (1992)
1991
5EEVojin G. Oklobdzija, Belle Wei: Introduction. VLSI Signal Processing 3(4): 263 (1991)
4EEBrian D. Lee, Vojin G. Oklobdzija: Improved CLA scheme with optimized delay. VLSI Signal Processing 3(4): 265-274 (1991)
1988
3 Vojin G. Oklobdzija, Earl R. Barnes: On Implementing Addition in VLSI Technology. J. Parallel Distrib. Comput. 5(6): 716-728 (1988)
1984
2 J. Paul Roth, Vojin G. Oklobdzija, John F. Beetem: Test Generation for FET Switching Circuits. ITC 1984: 59-62
1982
1 Vojin G. Oklobdzija, Milos D. Ercegovac: A On-Line Square Root Algorithm. IEEE Trans. Computers 31(1): 70-75 (1982)

Coauthor Index

1Marko Aleksic [29] [33] [35] [44]
2Raminder Singh Bajwa [24]
3Earl R. Barnes [3]
4John F. Beetem [2]
5Luis G. Bustamante [17]
6Pak K. Chan [6]
7J. Correa [12] [14]
8K. Wayne Current [20] [21] [26] [44]
9Hoang Q. Dao [28] [30] [37] [41] [42] [47] [49]
10Mikhail N. Dorojevets [11]
11Jean-Claude Duc [17]
12Milos D. Ercegovac [1]
13Aamir A. Farooqui [25] [39]
14Christophe Giacomotto [51] [54] [56]
15Jörg Henkel [57]
16Rupinder Hundal [9]
17Ali Keshavarzi [57]
18Ties Kluter (Theo T. J. H. Kluter) [45]
19Ram Krishnamurthy [40] [41] [42]
20Brian D. Lee [4]
21L. P. Lee [14]
22P. Lee [12]
23Simon S. Liu [19]
24Dragan Maksimovic [20] [21] [26]
25Charles U. Martel [15] [23]
26Sanu Mathew [41] [42]
27Robert K. Montoye [50]
28Nikola Nedovic [27] [29] [33] [35] [43] [44] [51]
29Borivoje Nikolic [21] [26]
30Kevin J. Nowka [28] [50]
31Barry M. Pangrle [57]
32R. Ravi [15] [23]
33C. P. Ravikumar [57]
34J. Paul Roth [2]
35K. J. Runge [12] [14]
36Martin Saint-Laurent [32]
37Sadiq M. Sait [39]
38R. T. Scalettar [12] [14]
39Martine D. F. Schlag [6]
40Mandeep Singh [54] [56]
41Simon S. Singh [32]
42Michael A. Soderstrand [17]
43Thierry Soulas [7]
44Jens Sparsø [34]
45Paul F. Stelling [15] [16] [22] [23]
46Vladimir Stojanovic [24]
47Richard H. Strandberg [17]
48Madhavan Swaminathan [32]
49Clark D. Thomborson (Clark D. Thompson) [6]
50Narayanan Vijaykrishnan (Vijaykrishnan Narayanan) [57]
51David Villeger [7] [13] [19]
52Milena Vratonjic [46] [52] [56]
53J. L. Vujic [12]
54William W. Walker [38]
55Belle Wei [5] [18]
56Xiao Yan Yu [38] [50]
57Bart R. Zeydel [37] [41] [42] [45] [46] [47] [49] [50] [52] [53] [54]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)