| |
| 2008 | ||
|---|---|---|
| 4 | EE | Felipe Machado, Teresa Riesgo, Yago Torroja: Disjoint Region Partitioning for Probabilistic Switching Activity Estimation at Register Transfer Level. PATMOS 2008: 399-408 |
| 2006 | ||
| 3 | EE | Felipe Machado, Teresa Riesgo, Yago Torroja: A Method for Switching Activity Analysis of VHDL-RTL Combinatorial Circuits. PATMOS 2006: 645-657 |
| 1998 | ||
| 2 | EE | Teresa Riesgo, Yago Torroja, Eduardo de la Torre, J. Uceda: Quality Estimation of Test Vectors and Functional Validation Procedures Based on Fault and Error Models. DATE 1998: 955-956 |
| 1996 | ||
| 1 | José Luis Ruiz, Yago Torroja, José Luis García: Design of a VME Parametrized Library for FPGAs. FPL 1996: 394-399 | |
| 1 | José Luis García | [1] |
| 2 | Felipe Machado | [3] [4] |
| 3 | Teresa Riesgo | [2] [3] [4] |
| 4 | José Luis Ruiz | [1] |
| 5 | Eduardo de la Torre | [2] |
| 6 | J. Uceda | [2] |