| 2008 |
|---|
| 9 | EE | Masanori Muroyama,
Tohru Ishihara,
Hiroto Yasuura:
Analysis of Effects of Input Arrival Time Variations on On-Chip Bus Power Consumption.
PATMOS 2008: 62-71 |
| 8 | EE | Tohru Ishihara,
Seiichiro Yamaguchi,
Yuriko Ishitobi,
Tadayuki Matsumura,
Yuji Kunitake,
Yuichiro Oyama,
Yusuke Kaneda,
Masanori Muroyama,
Toshinori Sato:
AMPLE: An Adaptive Multi-Performance Processor for Low-Energy Embedded Applications.
SASP 2008: 83-88 |
| 2006 |
|---|
| 7 | EE | Donghoon Lee,
Tohru Ishihara,
Masanori Muroyama,
Hiroto Yasuura,
Farzan Fallah:
An Energy Characterization Framework for Software-Based Embedded Systems.
ESTImedia 2006: 59-64 |
| 6 | EE | Makoto Sugihara,
Tohru Ishihara,
Masanori Muroyama,
Koji Hashimoto:
A Simulation-Based Soft Error Estimation Methodology for Computer Systems.
ISQED 2006: 196-203 |
| 2005 |
|---|
| 5 | EE | Masanori Muroyama,
Kosuke Tarumi,
Koji Makiyama,
Hiroto Yasuura:
A variation-aware low-power coding methodology for tightly coupled buses.
ASP-DAC 2005: 557-560 |
| 4 | EE | Kosuke Tarumi,
Akihiko Hyodo,
Masanori Muroyama,
Hiroto Yasuura:
Bitwidth Optimization for Low Power Digital FIR Filter Design.
IEICE Transactions 88-A(4): 869-875 (2005) |
| 2003 |
|---|
| 3 | EE | Masanori Muroyama,
Akihiko Hyodo,
Takanori Okuma,
Hiroto Yasuura:
A Power Reduction Scheme for Data Buses by Dynamic Detection of Active Bits.
DSD 2003: 408-415 |
| 2002 |
|---|
| 2 | EE | Takanori Okuma,
Yun Cao,
Masanori Muroyama,
Hiroto Yasuura:
Reducing access energy of on-chip data memory considering active data bitwidth.
ISLPED 2002: 88-91 |
| 1 | EE | Masanori Muroyama,
Tohru Ishihara,
Akihiko Hyodo,
Hiroto Yasuura:
A Power Minimization Technique for Arithmetic Circuits by Cell Selection.
VLSI Design 2002: 268-273 |
