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Paulino Ruiz-de-Clavijo

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2008
16EEAlejandro Millán, Jorge Juan, Manuel J. Bellido, David Guerrero, Paulino Ruiz-de-Clavijo, Julian Viejo: Power Dissipation Associated to Internal Effect Transitions in Static CMOS Gates. PATMOS 2008: 389-398
2007
15EEDavid Guerrero, Alejandro Millán, Jorge Juan-Chico, Manuel J. Bellido, Paulino Ruiz-de-Clavijo, Enrique Ostúa, Julian Viejo: Static Power Consumption in CMOS Gates Using Independent Bodies. PATMOS 2007: 404-412
14EEJulian Viejo, Alejandro Millán, Manuel J. Bellido, Jorge Juan, Paulino Ruiz-de-Clavijo, David Guerrero, Enrique Ostúa, A. Munoz: Design of a FFT/IFFT module as an IP core suitable for embedded systems. SIES 2007: 337-340
13EEDavid Guerrero, Alejandro Millán, Jorge Juan-Chico, Manuel Jesús Bellido Díaz, Paulino Ruiz-de-Clavijo, Enrique Ostúa, Julian Viejo: Improving the Performance of Static CMOS Gates by Using Independent Bodies. J. Low Power Electronics 3(1): 70-77 (2007)
2006
12EEPaulino Ruiz-de-Clavijo, Jorge Juan-Chico, Manuel Jesús Bellido Díaz, Alejandro Millán, David Guerrero, Enrique Ostúa, Julian Viejo: Accurate Logic-Level Current Estimation for Digital CMOS Circuits. J. Low Power Electronics 2(1): 87-94 (2006)
2005
11EEAlejandro Millán Calderón, Manuel Jesús Bellido Díaz, Jorge Juan-Chico, Paulino Ruiz-de-Clavijo, David Guerrero Martos, Enrique Ostúa, Julian Viejo: Application of Internode Model to Global Power Consumption Estimation in SCMOS Gates. PATMOS 2005: 337-347
10EEPaulino Ruiz-de-Clavijo, Jorge Juan-Chico, Manuel Jesús Bellido Díaz, Alejandro Millán Calderón, David Guerrero Martos, Enrique Ostúa, Julian Viejo: Logic-Level Fast Current Simulation for Digital CMOS Circuits. PATMOS 2005: 425-435
2004
9EEAlejandro Millán, Jorge Juan-Chico, Manuel J. Bellido, Paulino Ruiz-de-Clavijo, David Guerrero, Enrique Ostúa: Signal Sampling Based Transition Modeling for Digital Gates Characterization. PATMOS 2004: 829-837
2003
8EEAlejandro Millán, Manuel J. Bellido, Jorge Juan-Chico, David Guerrero, Paulino Ruiz-de-Clavijo, Enrique Ostúa: Internode: Internal Node Logic Computational Model. Annual Simulation Symposium 2003: 241-248
7EEDavid Guerrero, Gustavo Wilke, José Luís Almada Güntzel, Manuel J. Bellido, Jorge Juan-Chico, Paulino Ruiz-de-Clavijo, Alejandro Millán: Computational Delay Models to Estimate the Delay of Floating Cubes in CMOS Circuits. PATMOS 2003: 501-510
2002
6EEC. Baena, Jorge Juan-Chico, Manuel J. Bellido, Paulino Ruiz-de-Clavijo, Carlos J. Jiménez, Manuel Valencia: Measurement of the Switching Activity of CMOS Digital Circuits at the Gate Level. PATMOS 2002: 353-362
5EEPaulino Ruiz-de-Clavijo, Jorge Juan-Chico, Manuel J. Bellido, Alejandro Millán, David Guerrero: Efficient and Fast Current Curve Estimation of CMOS Digital Circuits at the Logic Level. PATMOS 2002: 400-408
4EEAlejandro Millán, Jorge Juan-Chico, Manuel J. Bellido, Paulino Ruiz-de-Clavijo, David Guerrero: Characterization of Normal Propagation Delay for Delay Degradation Model (DDM). PATMOS 2002: 477-486
2001
3EEPaulino Ruiz-de-Clavijo, Jorge Juan-Chico, Manuel J. Bellido, Antonio J. Acosta, Manuel Valencia: HALOTIS: high accuracy LOgic TIming simulator with inertial and degradation delay model. DATE 2001: 467-471
2EEManuel J. Bellido, Jorge Juan-Chico, Paulino Ruiz-de-Clavijo, Antonio J. Acosta, Manuel Valencia: Gate-level simulation of CMOS circuits using the IDDM model. ISCAS (5) 2001: 483-486
2000
1EEJorge Juan-Chico, Manuel J. Bellido, Paulino Ruiz-de-Clavijo, Antonio J. Acosta, Manuel Valencia: Degradation Delay Model Extension to CMOS Gates. PATMOS 2000: 149-158

Coauthor Index

1Antonio J. Acosta [1] [2] [3]
2C. Baena [6]
3Manuel Jesús Bellido Díaz (Manuel J. Bellido) [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16]
4David Guerrero [4] [5] [7] [8] [9] [12] [13] [14] [15] [16]
5José Luís Almada Güntzel [7]
6Carlos J. Jiménez [6]
7Jorge Juan [14] [16]
8Jorge Juan-Chico [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [15]
9David Guerrero Martos [10] [11]
10Alejandro Millán (Alejandro Millán Calderón) [4] [5] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16]
11A. Munoz [14]
12Enrique Ostúa [8] [9] [10] [11] [12] [13] [14] [15]
13Manuel Valencia [1] [2] [3] [6]
14Julian Viejo [10] [11] [12] [13] [14] [15] [16]
15Gustavo Wilke [7]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)