| 2008 |
|---|
| 8 | EE | Sven Eisenhardt,
Thomas Schweizer,
Julio A. de Oliveira Filho,
Tobias Oppold,
Wolfgang Rosenstiel,
Alexander Thomas,
Jürgen Becker,
Frank Hannig,
Dmitrij Kissler,
Hritam Dutta,
Jürgen Teich,
Heiko Hinkelmann,
Peter Zipf,
Manfred Glesner:
Coarse-grained reconfiguration.
FPL 2008: 349 |
| 7 | EE | Dmitrij Kissler,
Andreas Strawetz,
Frank Hannig,
Jürgen Teich:
Power-Efficient Reconfiguration Control in Coarse-Grained Dynamically Reconfigurable Architectures.
PATMOS 2008: 307-317 |
| 2007 |
|---|
| 6 | EE | Alexey Kupriyanov,
Frank Hannig,
Dmitrij Kissler,
Jürgen Teich,
Julien Lallet,
Olivier Sentieys,
Sébastien Pillement:
Modeling of Interconnection Networks in Massively Parallel Processor Architectures.
ARCS 2007: 268-282 |
| 5 | | Jürgen Teich,
Frank Hannig,
Holger Ruckdeschel,
Hritam Dutta,
Dmitrij Kissler,
Andrej Stravet:
A Unified Retargetable Design Methodology for Dedicated and Re-Programmable Multiprocessor Arrays: Case Study and Quantitative Evaluation.
ERSA 2007: 14-24 |
| 4 | | Hritam Dutta,
Frank Hannig,
Alexey Kupriyanov,
Dmitrij Kissler,
Jürgen Teich,
Rainer Schaffer,
Sebastian Siegel,
Renate Merker,
Bernard Pottier:
Massively Parallel Processor Architectures: A Co-design Approach.
ReCoSoC 2007: 61-68 |
| 3 | EE | Alexey Kupriyanov,
Dmitrij Kissler,
Frank Hannig,
Jürgen Teich:
Efficient event-driven simulation of parallel processor architectures.
SCOPES 2007: 71-80 |
| 2006 |
|---|
| 2 | | Dmitrij Kissler,
Alexey Kupriyanov,
Frank Hannig,
Dirk Koch,
Jürgen Teich:
A Generic Framework for Rapid Prototyping of System-on-Chip Designs.
CDES 2006: 189-195 |
| 1 | | Dmitrij Kissler,
Frank Hannig,
Alexey Kupriyanov,
Jürgen Teich:
A Dynamically Reconfigurable Weakly Programmable Processor Array Architecture Template.
ReCoSoC 2006: 31-37 |
