| 2008 |
|---|
| 83 | EE | Reinaldo A. Bergamaschi,
Guoling Han,
Alper Buyuktosunoglu,
Hiren D. Patel,
Indira Nair,
Gero Dittmann,
Geert Janssen,
Nagu R. Dhanwada,
Zhigang Hu,
Pradip Bose,
John A. Darringer:
Exploring power management in multi-core systems.
ASP-DAC 2008: 708-713 |
| 82 | EE | Xiaodong Li,
Sarita V. Adve,
Pradip Bose,
Jude A. Rivers:
Online Estimation of Architectural Vulnerability Factor for Soft Errors.
ISCA 2008: 341-352 |
| 81 | EE | Jeonghee Shin,
Victor V. Zyuban,
Pradip Bose,
Timothy Mark Pinkston:
A Proactive Wearout Recovery Approach for Exploiting Microarchitectural Redundancy to Extend Cache SRAM Lifetime.
ISCA 2008: 353-362 |
| 80 | EE | Pradeep Ramachandran,
Sarita V. Adve,
Pradip Bose,
Jude A. Rivers:
Metrics for Architecture-Level Lifetime Reliability Analysis.
ISPASS 2008: 202-212 |
| 79 | EE | Jude A. Rivers,
Pradip Bose,
Prabhakar Kudva,
John-David Wellman,
Pia N. Sanda,
Ethan H. Cannon,
Luiz C. Alves:
Phaser: Phased methodology for modeling the system-level effects of soft errors.
IBM Journal of Research and Development 52(3): 293-306 (2008) |
| 2007 |
|---|
| 78 | EE | Reinaldo A. Bergamaschi,
Indira Nair,
Gero Dittmann,
Hiren D. Patel,
Geert Janssen,
Nagu R. Dhanwada,
Alper Buyuktosunoglu,
Emrah Acar,
Gi-Joon Nam,
Dorothy Kucar,
Pradip Bose,
John A. Darringer,
Guoling Han:
Performance modeling for early analysis of multi-core systems.
CODES+ISSS 2007: 209-214 |
| 77 | EE | Xiaodong Li,
Sarita V. Adve,
Pradip Bose,
Jude A. Rivers:
Architecture-Level Soft Error Analysis: Examining the Limits of Common Assumptions.
DSN 2007: 266-275 |
| 76 | EE | Jeonghee Shin,
Victor V. Zyuban,
Zhigang Hu,
Jude A. Rivers,
Pradip Bose:
A Framework for Architecture-Level Lifetime Reliability Modeling.
DSN 2007: 534-543 |
| 75 | EE | Jeonghwan Choi,
Chen-Yong Cher,
Hubertus Franke,
Henrdrik Hamann,
Alan J. Weger,
Pradip Bose:
Thermal-aware task scheduling at the system software level.
ISLPED 2007: 213-218 |
| 74 | EE | Joseph J. Sharkey,
Alper Buyuktosunoglu,
Pradip Bose:
Evaluating design tradeoffs in on-chip power management for CMPs.
ISLPED 2007: 44-49 |
| 73 | EE | Hendrik F. Hamann,
Alan J. Weger,
James A. Lacey,
Zhigang Hu,
Pradip Bose,
Erwin Cohen,
Jamil A. Wakil:
Temperature-limited microprocessors: Measurements and design implications.
VLSI Design 2007: 427-432 |
| 72 | EE | Kevin Skadron,
Pradip Bose,
Kanad Ghose,
Resit Sendag,
Joshua J. Yi,
Derek Chiou:
Low-Power Design and Temperature Management.
IEEE Micro 27(6): 46-57 (2007) |
| 2006 |
|---|
| 71 | EE | Canturk Isci,
Alper Buyuktosunoglu,
Chen-Yong Cher,
Pradip Bose,
Margaret Martonosi:
An Analysis of Efficient Multi-Core Global Power Management Policies: Maximizing Performance for a Given Power Budget.
MICRO 2006: 347-358 |
| 70 | EE | Pradip Bose:
Measuring the impact of microarchitectural ideas.
IEEE Micro 26(1): 5-6 (2006) |
| 69 | EE | Pradip Bose:
Workload characterization: A key aspect of microarchitecture design.
IEEE Micro 26(2): 5-6 (2006) |
| 68 | EE | Pradip Bose:
Robust On-Chip Communication.
IEEE Micro 26(3): 5 (2006) |
| 67 | EE | Pradip Bose:
Pre-Silicon Modeling and Analysis: Impact On Real Design.
IEEE Micro 26(4): 3 (2006) |
| 66 | EE | Pradip Bose:
Designing reliable systems with unreliable components.
IEEE Micro 26(5): 5-6 (2006) |
| 65 | EE | Pradip Bose:
Looking briefly back, and then forward...
IEEE Micro 26(6): 8-9 (2006) |
| 2005 |
|---|
| 64 | EE | Xiaodong Li,
Sarita V. Adve,
Pradip Bose,
Jude A. Rivers:
SoftArch: An Architecture Level Tool for Modeling and Analyzing Soft Errors.
DSN 2005: 496-505 |
| 63 | EE | Hans M. Jacobson,
Pradip Bose,
Zhigang Hu,
Alper Buyuktosunoglu,
Victor V. Zyuban,
Rick Eickemeyer,
Lee Eisen,
John Griswell,
Doug Logan,
Balaram Sinharoy,
Joel M. Tendler:
Stretching the Limits of Clock-Gating Efficiency in Server-Class Processors.
HPCA 2005: 238-242 |
| 62 | EE | Jayanth Srinivasan,
Sarita V. Adve,
Pradip Bose,
Jude A. Rivers:
Exploiting Structural Duplication for Lifetime Reliability Enhancement.
ISCA 2005: 520-531 |
| 61 | EE | Pradip Bose:
Power-Aware, Reliable Microprocessor Design.
VLSI Design 2005: 3- |
| 60 | EE | Pradip Bose:
The "power" of communication.
IEEE Micro 25(1): 5 (2005) |
| 59 | EE | Pradip Bose:
Variation-tolerant design.
IEEE Micro 25(2): 5 (2005) |
| 58 | EE | Pradip Bose:
Integrated microarchitectures.
IEEE Micro 25(3): 5-6 (2005) |
| 57 | EE | Jayanth Srinivasan,
Sarita V. Adve,
Pradip Bose,
Jude A. Rivers:
Lifetime Reliability: Toward an Architectural Solution.
IEEE Micro 25(3): 70-80 (2005) |
| 56 | EE | Pradip Bose:
Presilicon modeling: challenges in the late CMOS era.
IEEE Micro 25(4): 5-6 (2005) |
| 55 | EE | Pradip Bose:
High performance at affordable power.
IEEE Micro 25(5): 5 (2005) |
| 54 | EE | Kunio Uchiyama,
Pradip Bose:
Guest Editors' Introduction: Energy-Efficient Design.
IEEE Micro 25(5): 6-9 (2005) |
| 53 | EE | Pradip Bose:
Designing microprocessors with robust functionality and performance.
IEEE Micro 25(6): 5 (2005) |
| 2004 |
|---|
| 52 | EE | Jayanth Srinivasan,
Sarita V. Adve,
Pradip Bose,
Jude A. Rivers:
The Impact of Technology Scaling on Lifetime Reliability.
DSN 2004: 177- |
| 51 | EE | Jayanth Srinivasan,
Sarita V. Adve,
Pradip Bose,
Jude A. Rivers:
The Case for Lifetime Reliability-Aware Microprocessors.
ISCA 2004: 276-287 |
| 50 | EE | Zhigang Hu,
Alper Buyuktosunoglu,
Viji Srinivasan,
Victor V. Zyuban,
Hans M. Jacobson,
Pradip Bose:
Microarchitectural techniques for power gating of execution units.
ISLPED 2004: 32-37 |
| 49 | EE | Yingmin Li,
David Brooks,
Zhigang Hu,
Kevin Skadron,
Pradip Bose:
Understanding the energy efficiency of simultaneous multithreading.
ISLPED 2004: 44-49 |
| 48 | EE | Pradip Bose:
Editor in Chief's Message: New Challenges and Burning Issues.
IEEE Micro 24(1): 5 (2004) |
| 47 | EE | Pradip Bose:
EIC's Message: Chip-level microarchitecture trends.
IEEE Micro 24(2): 5- (2004) |
| 46 | EE | Pradip Bose:
EIC's Message: General-purpose versus application-specific processors.
IEEE Micro 24(3): 5- (2004) |
| 45 | EE | Pradip Bose:
Editor in Chief's Message: Saving power-Lessons from embedded systems.
IEEE Micro 24(4): 5-6 (2004) |
| 44 | EE | Pradip Bose:
Communication versus Computation.
IEEE Micro 24(5): 5 (2004) |
| 43 | EE | Pradip Bose:
Computer architecture research: Shifting priorities and newer challenges.
IEEE Micro 24(6): 5 (2004) |
| 42 | EE | Victor V. Zyuban,
David Brooks,
Viji Srinivasan,
Michael Gschwind,
Pradip Bose,
Philip N. Strenski,
Philip G. Emma:
Integrated Analysis of Power and Performance for Pipelined Microprocessors.
IEEE Trans. Computers 53(8): 1004-1016 (2004) |
| 41 | EE | David Brooks,
Pradip Bose,
Margaret Martonosi:
Power-performance simulation: design and validation strategies.
SIGMETRICS Performance Evaluation Review 31(4): 13-18 (2004) |
| 2003 |
|---|
| 40 | EE | Alper Buyuktosunoglu,
Tejas Karkhanis,
David H. Albonesi,
Pradip Bose:
Energy Efficient Co-Adaptive Instruction Fetch and Issue.
ISCA 2003: 147-156 |
| 39 | EE | David Brooks,
Pradip Bose,
Viji Srinivasan,
Michael Gschwind,
Philip G. Emma,
Michael G. Rosenfield:
New methodology for early-stage, microarchitecture-level power-performance analysis of microprocessors.
IBM Journal of Research and Development 47(5-6): 653-670 (2003) |
| 38 | EE | David H. Albonesi,
Rajeev Balasubramonian,
Steve Dropsho,
Sandhya Dwarkadas,
Eby G. Friedman,
Michael C. Huang,
Volkan Kursun,
Grigorios Magklis,
Michael L. Scott,
Greg Semeraro,
Pradip Bose,
Alper Buyuktosunoglu,
Peter W. Cook,
Stanley Schuster:
Dynamically Tuning Processor Resources with Adaptive Processing.
IEEE Computer 36(12): 49-58 (2003) |
| 37 | EE | Pradip Bose:
Looking Forward to Bright New Beginnings.
IEEE Micro 23(1): 5-6 (2003) |
| 36 | EE | Pradip Bose:
Issues and Trends in High-Performance Processor Cores.
IEEE Micro 23(2): 5 (2003) |
| 35 | EE | Pradip Bose:
Design and Integration: Chip- and System-Level Challenges.
IEEE Micro 23(3): 5 (2003) |
| 34 | EE | Pradip Bose:
Editor-in-Chief?s Message: Adapting Old Paradigms to Meet New Challenges.
IEEE Micro 23(4): 5 (2003) |
| 33 | EE | Pradip Bose,
David H. Albonesi,
Diana Marculescu:
Guest Editors' Introduction: Power and Complexity Aware Design.
IEEE Micro 23(5): 8-11 (2003) |
| 32 | EE | Charles R. Moore,
Kevin W. Rudd,
Ruby B. Lee,
Pradip Bose:
Guest Editors' Introduction: Micro's Top Picks from Microarchitecture Conferences.
IEEE Micro 23(6): 8-10 (2003) |
| 2002 |
|---|
| 31 | EE | Hans M. Jacobson,
Prabhakar Kudva,
Pradip Bose,
Peter W. Cook,
Stanley Schuster:
Synchronous Interlocked Pipelines.
ASYNC 2002: 3-12 |
| 30 | EE | Tejas Karkhanis,
James E. Smith,
Pradip Bose:
Saving energy with just in time instruction delivery.
ISLPED 2002: 178-183 |
| 29 | EE | Alper Buyuktosunoglu,
David H. Albonesi,
Pradip Bose,
Peter W. Cook,
Stanley Schuster:
Tradeoffs in power-efficient issue queue design.
ISLPED 2002: 184-189 |
| 28 | EE | Viji Srinivasan,
David Brooks,
Michael Gschwind,
Pradip Bose,
Victor V. Zyuban,
Philip N. Strenski,
Philip G. Emma:
Optimizing pipelines for power and performance.
MICRO 2002: 333-344 |
| 27 | EE | Pradip Bose,
David Brooks,
Alper Buyuktosunoglu,
Peter W. Cook,
K. Das,
Philip G. Emma,
Michael Gschwind,
Hans M. Jacobson,
Tejas Karkhanis,
Prabhakar Kudva,
Stanley Schuster,
James E. Smith,
Viji Srinivasan,
Victor V. Zyuban,
David H. Albonesi,
Sandhya Dwarkadas:
Early-Stage Definition of LPX: A Low Power Issue-Execute Processor.
PACS 2002: 1-17 |
| 2001 |
|---|
| 26 | EE | Alper Buyuktosunoglu,
David H. Albonesi,
Stanley Schuster,
David Brooks,
Pradip Bose,
Peter W. Cook:
A circuit level implementation of an adaptive issue queue for power-aware microprocessors.
ACM Great Lakes Symposium on VLSI 2001: 73-78 |
| 25 | EE | Pradip Bose:
Ensuring Dependable Processor Performance: An Experience Report on Pre-Silicon Performance Validation.
DSN 2001: 481-486 |
| 2000 |
|---|
| 24 | EE | David Brooks,
Margaret Martonosi,
John-David Wellman,
Pradip Bose:
Power-Performance Modeling and Tradeoff Analysis for a High End Microprocessor.
PACS 2000: 126-136 |
| 23 | EE | Alper Buyuktosunoglu,
Stanley Schuster,
David Brooks,
Pradip Bose,
Peter W. Cook,
David H. Albonesi:
An Adaptive Issue Queue for Reduced Power at High Performance.
PACS 2000: 25-39 |
| 22 | EE | Pradip Bose,
Jacob A. Abraham:
Performance and Functional Verification of Microprocessors.
VLSI Design 2000: 58-63 |
| 21 | EE | David Brooks,
Pradip Bose,
Stanley Schuster,
Hans M. Jacobson,
Prabhakar Kudva,
Alper Buyuktosunoglu,
John-David Wellman,
Victor V. Zyuban,
Manish Gupta,
Peter W. Cook:
Power-Aware Microarchitecture: Design and Modeling Challenges for Next-Generation Microprocessors.
IEEE Micro 20(6): 26-44 (2000) |
| 20 | EE | Pradip Bose:
Testing for Function and Performance: Towards an Integrated Processor Validation Methodology.
J. Electronic Testing 16(1-2): 29-48 (2000) |
| 1999 |
|---|
| 19 | EE | Pradip Bose:
Performance Evaluation and Validation of Microprocessors.
SIGMETRICS 1999: 226-227 |
| 1998 |
|---|
| 18 | EE | Pradip Bose:
Performance Test Case Generation for Microprocessors.
VTS 1998: 54-61 |
| 17 | | Pradip Bose,
Thomas M. Conte:
Performance Analysis and Its Impact on Design.
IEEE Computer 31(5): 41-49 (1998) |
| 1997 |
|---|
| 16 | EE | Anthony-Trung Nguyen,
Pradip Bose,
Kattamuri Ekanadham,
Ashwini K. Nanda,
Maged M. Michael:
Accuracy and Speedup of Parallel Trace-Driven Architectural Simulation.
IPPS 1997: 39-44 |
| 15 | EE | Pradip Bose:
Preface.
IBM Journal of Research and Development 41(3): 204-204 (1997) |
| 1996 |
|---|
| 14 | EE | Vijay S. Iyengar,
Louise Trevillyan,
Pradip Bose:
Representative Traces for Processor Models with Infinite Cache.
HPCA 1996: 62-72 |
| 1995 |
|---|
| 13 | | Pradip Bose,
S. Surya:
Architectural timing verification of CMOS RISC processors.
IBM Journal of Research and Development 39(1-2): 113-130 (1995) |
| 1994 |
|---|
| 12 | | Pradip Bose:
Architectural Timing Verification and Test for Super Scalar Processors.
FTCS 1994: 256-265 |
| 11 | | S. Surya,
Pradip Bose,
Jacob A. Abraham:
Architectural Performance Verification: PowerPCTM Processors.
ICCD 1994: 344-347 |
| 1993 |
|---|
| 10 | | Pradip Bose,
John-David Wellman:
MIPS-Driven Early Design and Analysis of VLSI CPU Chips.
VLSI Design 1993: 256-259 |
| 1992 |
|---|
| 9 | | Pradip Bose,
David LaPotin,
Gopalakrishnan Vijayan,
Sungho Kim:
Workload-Driven Floorplanning for MIPS Optimization.
ICCD 1992: 387-391 |
| 1991 |
|---|
| 8 | | Pradip Bose:
Early Performance Estimation of Super Scalar Machine Models.
ICCD 1991: 388-392 |
| 1988 |
|---|
| 7 | | Pradip Bose:
Parallel Simulation and Test of VLSI Array Logic.
AWOC 1988: 301-311 |
| 6 | | Pradip Bose:
Heuristic Rule-Based Program Transformations for Enhanced Vectorization.
ICPP (2) 1988: 63-66 |
| 5 | EE | Pradip Bose:
Interactive program improvement via EAVE: an expert adviser for vectorization.
ICS 1988: 119-130 |
| 4 | | Pradip Bose:
A Novel Technique for Efficient Parallel Implementation of a Classical Logic/Fault Simulation Problem.
IEEE Trans. Computers 37(12): 1569-1577 (1988) |
| 1986 |
|---|
| 3 | | Pradip Bose:
Optimal Code Generation for Expressions on Super Scalar Machines.
FJCC 1986: 372-379 |
| 1984 |
|---|
| 2 | | Pradip Bose,
Edward S. Davidson:
Design of Instruction Set Architectures for Support of High-Level Languages .
ISCA 1984: 198-206 |
| 1982 |
|---|
| 1 | EE | Pradip Bose,
B. Ramakrishna Rau,
Michael S. Schlansker:
Systematically derived instruction sets for high-level language support.
ACM Southeast Regional Conference 1982: 73-84 |
