Margaret Martonosi

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100EEAndré Seznec, Joel S. Emer, Michael F. P. O'Boyle, Margaret Martonosi, Theo Ungerer: High Performance Embedded Architectures and Compilers, Fourth International Conference, HiPEAC 2009, Paphos, Cyprus, January 25-28, 2009. Proceedings Springer 2009
99 Tarek F. Abdelzaher, Margaret Martonosi, Adam Wolisz: Proceedings of the 6th International Conference on Embedded Networked Sensor Systems, SenSys 2007, Raleigh, NC, USA, November 5-7, 2008 ACM 2008
98EEMargaret Martonosi: ZebraNet and beyond: applications and systems support for mobile, dynamic networks. CASES 2008: 21
97EEGilberto Contreras, Margaret Martonosi: Characterizing and improving the performance of Intel Threading Building Blocks. IISWC 2008: 57-66
96EEPei Zhang, Margaret Martonosi: LOCALE: Collaborative Localization Estimation for Sparse Mobile Sensor Networks. IPSN 2008: 195-206
95EEAbhishek Bhattacharjee, Gilberto Contreras, Margaret Martonosi: Full-system chip multiprocessor power evaluations using FPGA-based emulation. ISLPED 2008: 335-340
94EESibren Isaacman, Margaret Martonosi: Potential for collaborative caching and prefetching in largely-disconnected villages. Wireless Networks and Systems for Developing Regions 2008: 23-30
93EEEric Chi, Stephen A. Lyon, Margaret Martonosi: Tailoring quantum architectures to implementation style: a quantum computer for mobile and persistent qubits. ISCA 2007: 198-209
92EEChristopher M. Sadler, Margaret Martonosi: Dali: a communication-centric data abstraction layer for energy-constrained devices in mobile sensor networks. MobiSys 2007: 99-112
91EEGilberto Contreras, Margaret Martonosi, Jinzhang Peng, Guei-Yuan Lueh, Roy Ju: The XTREM power and performance simulator for the Intel XScale core: Design and experiences. ACM Trans. Embedded Comput. Syst. 6(1): (2007)
90EEYong Wang, Margaret Martonosi, Li-Shiuan Peh: Predicting link quality using supervised learning in wireless sensor networks. Mobile Computing and Communications Review 11(3): 71-83 (2007)
89 John Paul Shen, Margaret Martonosi: Proceedings of the 12th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2006, San Jose, CA, USA, October 21-25, 2006 ACM 2006
88EECanturk Isci, Margaret Martonosi: Phase characterization for power: evaluating control-flow-based and event-counter-based techniques. HPCA 2006: 121-132
87EEGilberto Contreras, Margaret Martonosi: Techniques for Real-System Characterization of Java Virtual Machine Energy and Power Behavior. IISWC 2006: 29-38
86EEJames Donald, Margaret Martonosi: Techniques for Multicore Thermal Management: Classification and New Exploration. ISCA 2006: 78-88
85EEJames Donald, Margaret Martonosi: Power efficiency for variation-tolerant multicore processors. ISLPED 2006: 304-309
84EEMargaret Martonosi: Embedded systems in the wild: ZebraNet software, hardware, and deployment experiences. LCTES 2006: 1
83EEYong Wang, Margaret Martonosi, Li-Shiuan Peh: Situation-Aware Caching Strategies in Highly Varying Mobile Networks. MASCOTS 2006: 265-274
82EECanturk Isci, Alper Buyuktosunoglu, Chen-Yong Cher, Pradip Bose, Margaret Martonosi: An Analysis of Efficient Multi-Core Global Power Management Policies: Maximizing Performance for a Given Power Budget. MICRO 2006: 347-358
81EECanturk Isci, Gilberto Contreras, Margaret Martonosi: Live, Runtime Phase Monitoring and Prediction on Real Systems with Application to Dynamic Power Management. MICRO 2006: 359-370
80EEPei Zhang, Christopher M. Sadler, Margaret Martonosi: Middleware for long-term deployment of delay-tolerant sensor networks. MidSens 2006: 13-18
79EEChristopher M. Sadler, Margaret Martonosi: Data compression algorithms for energy-constrained devices in delay tolerant networks. SenSys 2006: 265-278
78EEPei Zhang, Margaret Martonosi: Energy adaptation techniques to optimize data delivery in store-and-forward sensor networks. SenSys 2006: 405-406
77EEJames Donald, Margaret Martonosi: An Efficient, Practical Parallelization Methodology for Multicore Architecture Simulation. Computer Architecture Letters 5(2): (2006)
76EEQiang Wu, Margaret Martonosi, Douglas W. Clark, Vijay Janapa Reddi, Dan Connors, Youfeng Wu, Jin Lee, David Brooks: Dynamic-Compiler-Driven Control for Microprocessor Energy and Performance. IEEE Micro 26(1): 119-129 (2006)
75EEFen Xie, Margaret Martonosi, Sharad Malik: Efficient behavior-driven runtime dynamic voltage scaling policies. CODES+ISSS 2005: 105-110
74EEQiang Wu, Philo Juang, Margaret Martonosi, Douglas W. Clark: Voltage and Frequency Control With Adaptive Reaction Time in Multiple-Clock-Domain Processors. HPCA 2005: 178-189
73EEPhilo Juang, Qiang Wu, Li-Shiuan Peh, Margaret Martonosi, Douglas W. Clark: Coordinated, distributed, formal energy management of chip multiprocessors. ISLPED 2005: 127-130
72EEGilberto Contreras, Margaret Martonosi: Power prediction for intel XScale processors using performance monitoring unit events. ISLPED 2005: 221-226
71EEFen Xie, Margaret Martonosi, Sharad Malik: Bounds on power savings using runtime dynamic voltage scaling: an exact algorithm and a linear-time heuristic approximation. ISLPED 2005: 287-292
70EEQiang Wu, Margaret Martonosi, Douglas W. Clark, Vijay Janapa Reddi, Dan Connors, Youfeng Wu, Jin Lee, David Brooks: A Dynamic Compilation Framework for Controlling Microprocessor Energy and Performance. MICRO 2005: 271-282
69EEYong Wang, Margaret Martonosi, Li-Shiuan Peh: A new scheme on link quality prediction and its applications to metric-based routing. SenSys 2005: 288-289
68EECanturk Isci, Alper Buyuktosunoglu, Margaret Martonosi: Long-Term Workload Phases: Duration Predictions and Applications to DVFS. IEEE Micro 25(5): 39-51 (2005)
67EEQiang Wu, Philo Juang, Margaret Martonosi, Li-Shiuan Peh, Douglas W. Clark: Formal Control Techniques for Power-Performance Management. IEEE Micro 25(5): 52-62 (2005)
66EEJulia Chen, Philo Juang, Kevin Ko, Gilberto Contreras, David Penry, Ram Rangan, Adam Stoler, Li-Shiuan Peh, Margaret Martonosi: Hardware-modulated parallelism in chip multiprocessors. SIGARCH Computer Architecture News 33(4): 54-63 (2005)
65EEQiang Wu, Philo Juang, Margaret Martonosi, Douglas W. Clark: Formal online methods for voltage/frequency control in multiple clock domain microprocessors. ASPLOS 2004: 248-259
64EERuss Joseph, Zhigang Hu, Margaret Martonosi: Wavelet Analysis for Microprocessor Design: Experiences with Wavelet-Based dI/dt Characterization. HPCA 2004: 36-47
63EERuss Joseph, Margaret Martonosi, Zhigang Hu: Spectral analysis for characterizing program power and performance. ISPASS 2004: 151-160
62EEGilberto Contreras, Margaret Martonosi, Jinzhan Peng, Roy Ju, Guei-Yuan Lueh: XTREM: a power simulator for the Intel XScale® core. LCTES 2004: 115-125
61 Ting Liu, Christopher M. Sadler, Pei Zhang, Margaret Martonosi: Implementing Software on Resource-Constrained Mobile Sensors: Experiences with Impala and ZebraNet. MobiSys 2004
60EEPei Zhang, Christopher M. Sadler, Stephen A. Lyon, Margaret Martonosi: Hardware design experiences in ZebraNet. SenSys 2004: 227-238
59EEYong Wang, Margaret Martonosi, Li-Shiuan Peh: MARio: mobility-adaptive routing using route lifetime abstractions in mobile ad hoc networks. Mobile Computing and Communications Review 8(4): 77-81 (2004)
58EEDavid Brooks, Pradip Bose, Margaret Martonosi: Power-performance simulation: design and validation strategies. SIGMETRICS Performance Evaluation Review 31(4): 13-18 (2004)
57EEPhilo Juang, Kevin Skadron, Margaret Martonosi, Zhigang Hu, Douglas W. Clark, Phil Diodato, Stefanos Kaxiras: Implementing branch-predictor decay using quasi-static memory cells. TACO 1(2): 180-219 (2004)
56EEFen Xie, Margaret Martonosi, Sharad Malik: Intraprogram dynamic voltage scaling: Bounding opportunities with analytic modeling. TACO 1(3): 323-367 (2004)
55EEZhigang Hu, Margaret Martonosi, Stefanos Kaxiras: TCP: Tag Correlating Prefetchers. HPCA 2003: 317-326
54EERuss Joseph, David Brooks, Margaret Martonosi: Control Techniques to Eliminate Voltage Emergencies in High Performance Processors. HPCA 2003: 79-90
53EECanturk Isci, Margaret Martonosi: Runtime Power Monitoring in High-End Processors: Methodology and Empirical Data. MICRO 2003: 93-104
52EEFen Xie, Margaret Martonosi, Sharad Malik: Compile-time dynamic voltage scaling settings: opportunities and limits. PLDI 2003: 49-62
51EETing Liu, Margaret Martonosi: Impala: a middleware system for managing autonomic, parallel sensor systems. PPOPP 2003: 107-118
50EEKevin Skadron, Margaret Martonosi, David I. August, Mark D. Hill, David J. Lilja, Vijay S. Pai: Challenges in Computer Architecture Evaluation. IEEE Computer 36(8): 30-36 (2003)
49EEPhilo Juang, Hidekazu Oki, Yong Wang, Margaret Martonosi, Li-Shiuan Peh, Daniel Rubenstein: Energy-efficient computing for wildlife tracking: design tradeoffs and early experiences with ZebraNet. ASPLOS 2002: 96-107
48EEZhigang Hu, Philo Juang, Kevin Skadron, Douglas W. Clark, Margaret Martonosi: Applying Decay Strategies to Branch Predictors for Leakage Energy Savings. ICCD 2002: 442-445
47EEZhigang Hu, Margaret Martonosi, Stefanos Kaxiras: Timekeeping in the Memory System: Predicting and Optimizing Memory Behavior. ISCA 2002: 209-220
46EEZhigang Hu, Philo Juang, Phil Diodato, Stefanos Kaxiras, Kevin Skadron, Margaret Martonosi, Douglas W. Clark: Managing leakage for transient data: decay and quasi-static 4T memory cells. ISLPED 2002: 52-55
45EEZhigang Hu, Stefanos Kaxiras, Margaret Martonosi: Let caches decay: reducing leakage energy via exploitation of cache generational behavior. ACM Trans. Comput. Syst. 20(2): 161-190 (2002)
44EEPhilo Juang, Phil Diodato, Stefanos Kaxiras, Kevin Skadron, Zhigang Hu, Margaret Martonosi, Douglas W. Clark: Implementing Decay Techniques using 4T Quasi-Static Memory Cells. Computer Architecture Letters 1: (2002)
43EEDavid Brooks, Margaret Martonosi: Dynamic Thermal Management for High-Performance Microprocessors. HPCA 2001: 171-
42EEStefanos Kaxiras, Zhigang Hu, Margaret Martonosi: Cache decay: exploiting generational behavior to reduce cache leakage power. ISCA 2001: 240-251
41EERuss Joseph, Margaret Martonosi: Run-time power estimation in high performance microprocessors. ISLPED 2001: 135-140
40 Hongli Zhang, Margaret Martonosi: A Mathematical Cache Miss Analysis for Pointer Data Structures. PPSC 2001
39EEDarko Stefanovic, Margaret Martonosi: Limits and Graph Structure of Available Instruction-Level Parallelism (Research Note). Euro-Par 2000: 1018-1022
38EEDarko Stefanovic, Margaret Martonosi: On Availability of Bit-Narrow Operations in General-Purpose Applications. FPL 2000: 412-421
37EESomnath Ghosh, Margaret Martonosi, Sharad Malik: Automated cache optimizations using CME driven diagnosis. ICS 2000: 316-326
36EEKevin Skadron, Margaret Martonosi, Douglas W. Clark: A Taxonomy of Branch Mispredictions, and Alloyed Prediction as a Robust Solution to Wrong-History Mispredictions. IEEE PACT 2000: 199-206
35EEXianfeng Zhou, Margaret Martonosi: Augmenting Modern Superscalar Architectures with Configurable Extended Instructions. IPDPS Workshops 2000: 941-950
34EEDavid Brooks, Vivek Tiwari, Margaret Martonosi: Wattch: a framework for architectural-level power analysis and optimizations. ISCA 2000: 83-94
33EEDavid Brooks, Margaret Martonosi, John-David Wellman, Pradip Bose: Power-Performance Modeling and Tradeoff Analysis for a High End Microprocessor. PACS 2000: 126-136
32EEDavid Brooks, Margaret Martonosi: Value-based clock gating and operation packing: dynamic strategies for improving processor power and performance. ACM Trans. Comput. Syst. 18(2): 89-126 (2000)
31 Per Stenström, Erik Hagersten, David J. Lilja, Margaret Martonosi, Madan Venugopal: Shared-memory multiprocessing: Current state and future directions. Advances in Computers 53: 2-55 (2000)
30EEZhen Luo, Margaret Martonosi: Accelerating Pipelined Integer and Floating-Point Accumulations in Configurable Hardware with Delayed Addition Techniques. IEEE Trans. Computers 49(3): 208-218 (2000)
29EEKevin Skadron, Margaret Martonosi, Douglas W. Clark: Speculative Updates of Local and Global Branch History: A Quantitative Analysis. J. Instruction-Level Parallelism 2: (2000)
28 David Brooks, Margaret Martonosi: Implementing Application-Specific Cache-Coherence Protocols in Configurable Hardware. CANPC 1999: 181-195
27EEZhen Luo, Margaret Martonosi, Pranav Ashar: An Edge-Endpoint-Based Configurable Hardware Architecture for VLSI CAD Layout Design Rule Checking. FCCM 1999: 158-167
26EEDavid Brooks, Margaret Martonosi: Dynamically Exploiting Narrow Width Operands to Improve Processor Power and Performance. HPCA 1999: 13-22
25EECheng Liao, Margaret Martonosi, Douglas W. Clark: An Adaptive Globally-Synchronizing Clock Algorithm and its Implementation on a Myrinet-based PC Cluster. SIGMETRICS 1999: 200-201
24EECheng Liao, Margaret Martonosi, Douglas W. Clark: Experience with an Adaptive Globally-Synchronizing Clock Algorithm. SPAA 1999: 106-114
23EESomnath Ghosh, Margaret Martonosi, Sharad Malik: Cache miss equations: a compiler framework for analyzing and tuning memory behavior. ACM Trans. Program. Lang. Syst. 21(4): 703-746 (1999)
22EEKevin Skadron, Pritpal A. Ahuja, Margaret Martonosi, Douglas W. Clark: Branch Prediction, Instruction-Window Size, and Cache Size: Performance Trade-Offs and Simulation Techniques. IEEE Trans. Computers 48(11): 1260-1281 (1999)
21EEPeixin Zhong, Margaret Martonosi, Pranav Ashar, Sharad Malik: Using configurable computing to accelerate Boolean satisfiability. IEEE Trans. on CAD of Integrated Circuits and Systems 18(6): 861-868 (1999)
20EESomnath Ghosh, Margaret Martonosi, Sharad Malik: Precise Miss Analysis for Program Transformations with Caches of Arbitrary Associativity. ASPLOS 1998: 228-239
19EEPeixin Zhong, Pranav Ashar, Sharad Malik, Margaret Martonosi: Using Reconfigurable Computing Techniques to Accelerate Problems in the CAD Domain: A Case Study with Boolean Satisfiability. DAC 1998: 194-199
18EEPeixin Zhong, Margaret Martonosi, Pranav Ashar, Sharad Malik: Accelerating Boolean Satisfiability with Configurable Hardware. FCCM 1998: 186-195
17EEPeixin Zhong, Margaret Martonosi, Pranav Ashar, Sharad Malik: Solving Boolean Satisfiability with Dynamic Hardware Configurations. FPL 1998: 326-335
16EEMatthias A. Blumrich, Richard Alpert, Yuqun Chen, Douglas W. Clark, Stefanos N. Damianakis, Cezary Dubnicki, Edward W. Felten, Liviu Iftode, Kai Li, Margaret Martonosi, Robert A. Shillner: Design Choices in the SHRIMP System: An Empirical Study. ISCA 1998: 330-341
15EEPritpal S. Ahuja, Kevin Skadron, Margaret Martonosi, Douglas W. Clark: Multipath Execution: Opportunities and Limits. International Conference on Supercomputing 1998: 101-108
14EECheng Liao, Dongming Jiang, Liviu Iftode, Margaret Martonosi, Douglas W. Clark: Monitoring Shared Virtual Memory Performance on a Myrinet-based PC Cluster. International Conference on Supercomputing 1998: 251-258
13EEKevin Skadron, Pritpal S. Ahuja, Margaret Martonosi, Douglas W. Clark: Improving Prediction for Procedure Returns with Return-address-stack Repair Mechanisms. MICRO 1998: 259-271
12EEMark Horowitz, Margaret Martonosi, Todd C. Mowry, Michael D. Smith: Informing Memory Operations: Memory Performance Feedback Mechanisms and Their Applications. ACM Trans. Comput. Syst. 16(2): 170-205 (1998)
11 Mary W. Hall, Margaret Martonosi: Adaptive parallelism in compiler-parallelized code. Concurrency - Practice and Experience 10(14): 1235-1250 (1998)
10EESharad Malik, Margaret Martonosi, Yau-Tsun Steven Li: Static Timing Analysis of Embedded Software. DAC 1997: 147-152
9EESomnath Ghosh, Margaret Martonosi, Sharad Malik: Cache Miss Equations: An Analytical Representation of Cache Misses. International Conference on Supercomputing 1997: 317-324
8 Per Stenström, Erik Hagersten, David J. Lilja, Margaret Martonosi, Madan Venugopal: Trends in Shared Memory Multiprocessing. IEEE Computer 30(12): 44-50 (1997)
7EEMark Horowitz, Margaret Martonosi, Todd C. Mowry, Michael D. Smith: Informing Memory Operations: Providing Memory Performance Feedback in Modern Processors. ISCA 1996: 260-270
6 Margaret Martonosi, David Ofelt, Mark Heinrich: Integrating Performance Monitoring and Communication in Parallel Computers. SIGMETRICS 1996: 138-147
5EEEvan Torrie, Margaret Martonosi, Chau-Wen Tseng, Mary W. Hall: Characterizing the Memory Behavior of Compiler-Parallelized Applications. IEEE Trans. Parallel Distrib. Syst. 7(12): 1224-1237 (1996)
4 Margaret Martonosi, Anoop Gupta, Thomas E. Anderson: Tuning Memory Performance of Sequential and Parallel Programs. IEEE Computer 28(4): 32-40 (1995)
3 Margaret Martonosi, Anoop Gupta, Thomas E. Anderson: Effectiveness of Trace Sampling for Performance Debugging Tools. SIGMETRICS 1993: 248-259
2 Margaret Martonosi, Anoop Gupta, Thomas E. Anderson: MemSpy: Analyzing Memory System Bottlenecks in Programs. SIGMETRICS 1992: 1-12
1 Margaret Martonosi, Anoop Gupta: Tradeoffs in Message Passing and Shared Memory Implementations of a Standard Cell Router. ICPP (3) 1989: 88-96

Coauthor Index

1Tarek F. Abdelzaher [99]
2Pritpal A. Ahuja [22]
3Pritpal S. Ahuja [13] [15]
4Richard Alpert [16]
5Thomas E. Anderson [2] [3] [4]
6Pranav Ashar [17] [18] [19] [21] [27]
7David I. August [50]
8Abhishek Bhattacharjee [95]
9Matthias A. Blumrich [16]
10Pradip Bose [33] [58] [82]
11David Brooks [26] [28] [32] [33] [34] [43] [54] [58] [70] [76]
12Alper Buyuktosunoglu [68] [82]
13Julia Chen [66]
14Yuqun Chen [16]
15Chen-Yong Cher [82]
16Eric Chi [93]
17Douglas W. Clark [13] [14] [15] [16] [22] [24] [25] [29] [36] [44] [46] [48] [57] [65] [67] [70] [73] [74] [76]
18Daniel A. Connors (Dan Connors) [70] [76]
19Gilberto Contreras [62] [66] [72] [81] [87] [91] [95] [97]
20Stefanos N. Damianakis [16]
21Phil Diodato [44] [46] [57]
22James Donald [77] [85] [86]
23Cezary Dubnicki [16]
24Joel S. Emer [100]
25Edward W. Felten [16]
26Somnath Ghosh [9] [20] [23] [37]
27Anoop Gupta [1] [2] [3] [4]
28Erik Hagersten [8] [31]
29Mary W. Hall [5] [11]
30Mark Heinrich [6]
31Mark D. Hill [50]
32Mark Horowitz [7] [12]
33Zhigang Hu [42] [44] [45] [46] [47] [48] [55] [57] [63] [64]
34Liviu Iftode [14] [16]
35Sibren Isaacman [94]
36Canturk Isci [53] [68] [81] [82] [88]
37Dongming Jiang [14]
38Russ Joseph [41] [54] [63] [64]
39Roy Dz-Ching Ju (Roy Ju, Dz-Ching Ju) [62] [91]
40Philo Juang [44] [46] [48] [49] [57] [65] [66] [67] [73] [74]
41Stefanos Kaxiras [42] [44] [45] [46] [47] [55] [57]
42Kevin Ko [66]
43Jin Lee [70] [76]
44Kai Li [16]
45Yau-Tsun Steven Li [10]
46Cheng Liao [14] [24] [25]
47David J. Lilja [8] [31] [50]
48Ting Liu [51] [61]
49Guei-Yuan Lueh [62] [91]
50Zhen Luo [27] [30]
51Stephen A. Lyon [60] [93]
52Sharad Malik [9] [10] [17] [18] [19] [20] [21] [23] [37] [52] [56] [71] [75]
53Todd C. Mowry [7] [12]
54Michael F. P. O'Boyle [100]
55David Ofelt [6]
56Hidekazu Oki [49]
57Vijay S. Pai [50]
58Li-Shiuan Peh [49] [59] [66] [67] [69] [73] [83] [90]
59Jinzhan Peng [62]
60Jinzhang Peng [91]
61David Penry [66]
62Ram Rangan [66]
63Vijay Janapa Reddi [70] [76]
64Daniel Rubenstein [49]
65Christopher M. Sadler [60] [61] [79] [80] [92]
66André Seznec [100]
67John Paul Shen [89]
68Robert A. Shillner [16]
69Kevin Skadron [13] [15] [22] [29] [36] [44] [46] [48] [50] [57]
70Michael D. Smith [7] [12]
71Darko Stefanovic [38] [39]
72Per Stenström [8] [31]
73Adam Stoler [66]
74Vivek Tiwari [34]
75Evan Torrie [5]
76Chau-Wen Tseng [5]
77Theo Ungerer [100]
78Madan Venugopal [8] [31]
79Yong Wang [49] [59] [69] [83] [90]
80John-David Wellman [33]
81Adam Wolisz [99]
82Qiang Wu [65] [67] [70] [73] [74] [76]
83Youfeng Wu [70] [76]
84Fen Xie [52] [56] [71] [75]
85Hongli Zhang [40]
86Pei Zhang [60] [61] [78] [80] [96]
87Peixin Zhong [17] [18] [19] [21]
88Xianfeng Zhou [35]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)