Volume 39,
Number 1-2,
1995
- Daniel J. Fleming:
Preface.
3-4
Electronic Edition (link) BibTeX
- Robert F. Sechler, Gregory F. Grohoski:
Design at the system level with VLSI CMOS.
5-22 BibTeX
- Robert F. Sechler:
Interconnect design with VLSI CMOS.
23-32 BibTeX
- Kerry Bernstein, John E. Bertsch, Lawrence G. Heller, Edward J. Nowak, Francis R. White:
Reduced-voltage power/performance optimization of the 3.6-volt PowerPC 601 Microprocessor.
33-42 BibTeX
- Toshio Sunaga, Koji Hosokawa, Sang H. Dhong, Koji Kitamura:
A 64Kb - 32 DRAM for graphics applications.
43-50 BibTeX
- Wayne F. Ellis, John E. Barth Jr., Sri Divakaruni, Jeffrey Dreibelbis, Anatol Furman, Erik L. Hedberg, Hsing-San Lee, Thomas M. Maffitt, Christopher P. Miller, Charles H. Stapper, Howard L. Kalter:
Multipurpose DRAM architecture for optimal power, performance, and product flexibility.
51-62 BibTeX
- Daniel M. Kuchta, Herschel A. Ainspan, Frank J. Canora, Richard P. Schneider Jr.:
Performance of fiber-optic data links using 670-nm cw VCSELs and a monolithic Si photodetector and CMOS preamplifier.
63-72 BibTeX
- John F. Ewen, Mehmet Soyuer, Albert X. Widmer, Kevin R. Wrenner, Benjamin D. Parker, Herschel A. Ainspan:
CMOS circuits for Gb/s serial data communication.
73-82 BibTeX
- Hyun J. Shin, Dale J. Pearson, Scott K. Reynolds, Andrew C. Megdanis, Sudhir M. Gowda, Kevin R. Wrenner:
Custom design of CMOS low-power high-performance digital signal-processing macro for hard-disk-drive applications.
83-92 BibTeX
- Roland A. Bechade, Robert M. Houle:
Digital delay line clock shapers and multipliers.
93-104 BibTeX
- Sang H. Dhong, Masahiro Tanaka, Steven W. Tomashot, Toshiaki Kirihata:
A low-noise TTL-compatible CMOS off-chip driver circuit.
105-112 BibTeX
- Pradip Bose, S. Surya:
Architectural timing verification of CMOS RISC processors.
113-130 BibTeX
- Reinaldo A. Bergamaschi, Richard A. O'Connor, Leon Stok, Michael Z. Moricz, Shiv Prakash, Andreas Kuehlmann, D. Sreenivasa Rao:
High-level synthesis in an industrial environment.
131-148 BibTeX
- Andreas Kuehlmann, Arvind Srinivasan, David P. LaPotin:
Verity - A formal verification program for custom CMOS circuits.
149-166 BibTeX
- Eric Adler, John K. DeBrosse, Stephen F. Geissler, Steven J. Holmes, Mark D. Jaffe, Jeffrey B. Johnson, Charles W. Koburger III, Jerome B. Lasky, Brian Lloyd, Glen L. Miles, James S. Nakos, Wendell P. Noble Jr., Steven H. Voldman, Michael Armacost, Richard Ferguson:
The evolution of IBM CMOS DRAM technology.
167-188
Electronic Edition (link) BibTeX
- Donald G. Chesebro, James W. Adkisson, Lyman R. Clark, Steven N. Eslinger, Margaret A. Faucher, Steven J. Holmes, Raymond P. Mallette, Edward J. Nowak, Edward W. Sengle, Steven H. Voldman, Thomas W. Weeks:
Overview of gate linewidth control in the manufacture of CMOS logic chips.
189-200 BibTeX
- George A. Leonovich, Anthony P. Franchino, William J. Miller, Uh-Po Eric Tsou:
Integrated cost and productivity learning in CMOS semiconductor manufacturing.
201-214 BibTeX
- Charles W. Koburger III, William F. Clark, James W. Adkisson, Eric Adler, Paul E. Bakeman, Albert S. Bergendahl, Alan B. Botula, W. Chang, Bijan Davari, John H. Givens, Howard H. Hansen, Steven J. Holmes, David V. Horak, Chung Hon Lam, Jerome B. Lasky, Stephen E. Luce, Randy W. Mann, Glen L. Miles, James S. Nakos, Edward J. Nowak, Ghavam Shahidi, Yuan Taur, Francis R. White, Matthew R. Wordeman:
A half-micron CMOS logic generation.
215-228 BibTeX
- G. G. Shahidi, James D. Warnock, James Comfort, Stephen E. Fischer, Patricia A. McFarland, Alexandre Acovic, Terry I. Chappell, Barbara A. Chappell, Tak H. Ning, Carl J. Anderson, Robert H. Dennard, J. Y.-C. Sun, Michael R. Polcari, Bijan Davari:
CMOS scaling in the 0.1-µm, 1.X-volt regime for high-performance applications.
229-244 BibTeX
- Yuan Taur, Yuh-Jier Mii, David J. Frank, H.-S. Philip Wong, Douglas A. Buchanan, Shalom J. Wind, Stephen A. Rishton, Watson A. Sai-Halasz, Edward J. Nowak:
CMOS scaling into the 21st century: 0.1 µm and beyond.
245-260 BibTeX
Volume 39,
Number 3,
1995
Volume 39,
Number 4,
1995
- T. S. Kuan:
Preface.
370-370
Electronic Edition (link) BibTeX
- James G. Ryan, Robert M. Geffken, Neil R. Poulin, Jurij R. Paraszczak:
The evolution of interconnection technology at IBM.
371-382
Electronic Edition (link) BibTeX
- Daniel C. Edelstein, George A. Sai-Halasz, Yuh-Jier Mii:
VLSI on-chip interconnection performance simulations and measurements.
383-402 BibTeX
- Randy W. Mann, Larry A. Clevenger, Paul D. Agnello, Francis R. White:
Silicides and local interconnections for high-performance VLSI applications.
403-418 BibTeX
- Thomas J. Licata, Evan G. Colgan, James M. E. Harper, Stephen E. Luce:
Interconnect fabrication processes and the development of low-cost wiring for CMOS products.
419-436 BibTeX
- Donna R. Cote, Son Van Nguyen, William J. Cote, Scott L. Pennington, Anthony K. Stamper, Dragan V. Podlesnik:
Low-temperature chemical vapor deposition processes and dielectrics for microelectronic circuit manufacturing at IBM.
437-464 BibTeX
- Chao-Kun Hu, Kenneth P. Rodbell, Timothy D. Sullivan, Kim Y. Lee, Dennis P. Bouldin:
Electromigration and stress-induced voiding in fine Al and Al-alloy thin-film lines.
465-498 BibTeX
Volume 39,
Number 5,
1995
- Takashi Ohta:
Use of multiple representations for simulating cloth shapes and motions: An overview.
523-530 BibTeX
- Hideto Niijima:
Design of a solid-state file using flash EEPROM.
531-546 BibTeX
- Alina Deutsch, Gerard V. Kopcsay, Christopher W. Surovic, Barry J. Rubin, Lewis M. Terman, Richard P. Dunne Jr., Thomas A. Gallo, Robert H. Dennard:
Modeling and characterization of long on-chip interconnections for high-performance microprocessors.
547-568 BibTeX
- Ramin A. Nobakht:
An algorithm for adaptive cancellation of phase jitter.
569-574 BibTeX
- Ramesh C. Agarwal, Susanne M. Balle, Fred G. Gustavson, Mahesh V. Joshi, Prasad V. Palkar:
A three-dimensional approach to parallel matrix multiplication.
575-582
Electronic Edition (link) BibTeX
Volume 39,
Number 6,
1995
- H. Kumar Wickramasinghe, Daniel Rugar:
Preface.
602-602
Electronic Edition (link) BibTeX
- Phaedon Avouris, In-Whan Lyo, Yukio Hasegawa:
Probing electrical transport, electron interference, and quantum size effects at surfaces with STM/STS.
603-616 BibTeX
- C. Mathew Mate:
Force microscopy studies of the molecular origins of friction and lubrication.
617-628 BibTeX
- Martin A. Lutz, Randall M. Feenstra, Jack O. Chu:
Atomic force microscopy studies of SiGe films and Si/SiGe heterostructures.
629-638 BibTeX
- David D. Chambliss, Robert J. Wilson, Shirley Chiang:
The use of STM to study metal film epitaxy.
639-654 BibTeX
- John R. Kirtley, Mark B. Ketchen, Chang C. Tsuei, Jonathan Z. Sun, William J. Gallagher, Lock See Yu-Jahnes, Arunava Gupta, Kevin G. Stawiasz, Shalom J. Wind:
Design and applications of a scanning SQUID microscope.
655-668
Electronic Edition (link) BibTeX
- Gary M. McClelland, Harry Heinzelmann, Fumiya Watanabe:
The femtosecond field-emission camera, a device for continuous observation of the motion of individual adsorbed atoms and molecules.
669-680 BibTeX
- H. Jonathon Mamin, Bruce D. Terris, Long-Sheng Fan, Storrs Hoen, Robert C. Barrett, Daniel Rugar:
High-density data storage using proximal probe techniques.
681-700 BibTeX
- Dieter W. Pohl:
Some thoughts about scanning probe microscopy, micromechanics, and storage.
701-712 BibTeX
Copyright © Sun May 17 00:00:11 2009
by Michael Ley (ley@uni-trier.de)
