Volume 20,
Number 1,
January/February 2000
Editor-in-Chief's Message
Letters
Micro News
Micro Standards
Micro Law
Micro Economics
Theme Article
- Anujan Varma, Mark Laubach:
Guest Editors' Introduction: Solving Interconnection Problems.
15-17
Electronic Edition (IEEE Computer Society DL) BibTeX
- Charles D. Cranor, R. Gopalakrishnan, Peter Z. Onufryk:
Architectural Considerations for CPU and Network Interface Integration.
18-26
Electronic Edition (IEEE Computer Society DL) BibTeX
- Tzi-cker Chiueh, Prashant Pradhan:
Cache Memory Design for Internet Processors.
28-33
Electronic Edition (IEEE Computer Society DL) BibTeX
- Pankaj Gupta, Nick McKeown:
Classifying Packets with Hierarchical Intelligent Cuttings.
34-41
Electronic Edition (IEEE Computer Society DL) BibTeX
- L. Louis Zhang, Brent Beacham, Massoud R. Hashemi, Paul Chow, Alberto Leon-Garcia:
A Scheduler ASIC for a Programmable Packet Switch.
42-48
Electronic Edition (IEEE Computer Society DL) BibTeX
- Benjamin Reed, Edward G. Chron, Randal C. Burns, Darrell D. E. Long:
Authenticating Network-Attached Storage.
49-57
Electronic Edition (IEEE Computer Society DL) BibTeX
- Dan Steinberg, Yitzhak Birk:
An Empirical Analysis of the IEEE-1394 Serial Bus Protocol.
58-65
Electronic Edition (IEEE Computer Society DL) BibTeX
Special Feature
Micro Review
Micro View
Volume 20,
Number 2,
March/April 2000
Editor-in-Chief's Message
New Applications and Demands
Letters
Micro Economics
Micro Law
Micro Review
Theme Article
- Monica S. Lam, Forest Baskett:
Guest Editors' Introduction: Cutting-Edge Designs.
14-15
Electronic Edition (IEEE Computer Society DL) BibTeX
- Henry Samueli:
The Broadband Revolution.
16-26
Electronic Edition (IEEE Computer Society DL) BibTeX
- Edward H. Frank, Jack Holloway:
Connecting the Home With a Phone Line Network Chip Set.
27-38
Electronic Edition (IEEE Computer Society DL) BibTeX
- Atsushi Kunimatsu, Nobuhiro Ide, Toshinori Sato, Yukio Endo, Hiroaki Murakami, Takayuki Kamei, Masashi Hirano, Fujio Ishihara, Haruyuki Tago, Masaaki Oka, Akio Ohba, Teiji Yutaka, Toyoshi Okada, Masakazu Suzuoki:
Vector Unit Architecture for Emotion Synthesis.
40-47
Electronic Edition (IEEE Computer Society DL) BibTeX
- Chris Basoglu, Woobin Lee, John Setel O'Donnell:
The MAP1000A VLIW Mediaprocessor.
48-59
Electronic Edition (IEEE Computer Society DL) BibTeX
- Ricardo E. Gonzalez:
Xtensa: A Configurable and Extensible Processor.
60-70
Electronic Edition (IEEE Computer Society DL) BibTeX
- Lance Hammond, Benedict A. Hubbert, Michael Siu, Manohar K. Prabhu, Michael K. Chen, Kunle Olukotun:
The Stanford Hydra CMP.
71-84
Electronic Edition (IEEE Computer Society DL) BibTeX
Special Feature
Product Summary
Volume 20,
Number 3,
May/June 2000
Editor-in-Chief's Message
News
Micro Review
Micro Law
Micro Economics
Theme Article
Special Feature
Micro Standards
Product Summary
Volume 20,
Number 4,
July/August 2000
Micro News
Micro Economics
Micro Review
Editor-in-Chief's Message
Microprocessors of the 21st Century,
Part 1 of 3
- Masato Edahiro, Satoshi Matsushita, Masakazu Yamashina, Naoki Nishi:
A Single-Chip Multiprocessor for Smart Terminals.
12-20
Electronic Edition (IEEE Computer Society DL) BibTeX
- Atsuhiro Suga, Kunihiko Matsunami:
Introducing the FR500 Embedded Microprocessor.
21-27
Electronic Edition (IEEE Computer Society DL) BibTeX
- Prasenjit Biswas, Atsushi Hasegawa, Srinivas Mandaville, Mark Debbage, Andy Sturges, Fumio Arakawa, Yasuhiko Saito, Kunio Uchiyama:
SH-5: The 64-Bit SuperH Architecture.
28-39
Electronic Edition (IEEE Computer Society DL) BibTeX
- Shigeo Araki:
The Memory Stick.
40-46
Electronic Edition (IEEE Computer Society DL) BibTeX
Special Feature
Education Track
Fault-Tolerant Track
Micro View
New Products
Volume 20,
Number 5,
September/October 2000
Editor-in-Chief's Message
Micro News
Micro Review
Micro Economics
Microprocessors of the 21st Century,
Part 2 of 3:
The Intel IA-64 Architecture
- John Crawford:
Guest Editor's Introduction: Introducing the Itanium Processors.
9-11
Electronic Edition (IEEE Computer Society DL) BibTeX
- Jerome C. Huck, Dale Morris, Jonathan Ross, Allan D. Knies, Hans Mulder, Rumi Zahir:
Introducing the IA-64 Architecture.
12-23
Electronic Edition (IEEE Computer Society DL) BibTeX
- Harsh Sharangpani, Ken Arora:
Itanium Processor Microarchitecture.
24-43
Electronic Edition (IEEE Computer Society DL) BibTeX
- Jay Bharadwaj, William Y. Chen, Weihaw Chuang, Gerolf Hoflehner, Kishore N. Menezes, Kalyan Muthukumar, Jim Pierce:
The Intel IA-64 Compiler Code Generator.
44-53
Electronic Edition (IEEE Computer Society DL) BibTeX
- Fumio Aono, Masayuki Kimura:
The AzusA 16-Way Itanium Server.
54-60
Electronic Edition (IEEE Computer Society DL) BibTeX
- Nhon T. Quach:
High Availability and Reliability in the Itanium Processor.
61-69
Electronic Edition (IEEE Computer Society DL) BibTeX
Special Feature
Micro Standards
Product Summary
Volume 20,
Number 6,
November/December 2000
Micro News
Micro Law
Micro Economics
Micro Standards
Microprocessors of the 21st Century,
Part 3 of 3
- Ken Sakamura:
Guest Editor's Introduction: Stepping Into the Future.
10-11
Electronic Edition (IEEE Computer Society DL) BibTeX
- Marc Tremblay, Jeffrey Chan, Shailender Chaudhry, Andrew W. Conigliaro, Shing Sheung Tse:
The MAJC Architecture: A Synthesis of Parallelism and Scalability.
12-25
Electronic Edition (IEEE Computer Society DL) BibTeX
- David Brooks, Pradip Bose, Stanley Schuster, Hans M. Jacobson, Prabhakar Kudva, Alper Buyuktosunoglu, John-David Wellman, Victor V. Zyuban, Manish Gupta, Peter W. Cook:
Power-Aware Microarchitecture: Design and Modeling Challenges for Next-Generation Microprocessors.
26-44
Electronic Edition (IEEE Computer Society DL) BibTeX
- Chris Herring:
Microprocessors, Microcontrollers, and Systems in the New Millennium.
45-51
Electronic Edition (IEEE Computer Society DL) BibTeX
- Gene Frantz:
Digital Signal Processor Trends.
52-59
Electronic Edition (IEEE Computer Society DL) BibTeX
Special Features
Product Summary
New Products
Copyright © Sun May 17 00:13:20 2009
by Michael Ley (ley@uni-trier.de)
