Victor V. Zyuban

2008
22	EE	Jeonghee Shin, Victor V. Zyuban, Pradip Bose, Timothy Mark Pinkston: A Proactive Wearout Recovery Approach for Exploiting Microarchitectural Redundancy to Extend Cache SRAM Lifetime. ISCA 2008: 353-362
2007
21	EE	Jeonghee Shin, Victor V. Zyuban, Zhigang Hu, Jude A. Rivers, Pradip Bose: A Framework for Architecture-Level Lifetime Reliability Modeling. DSN 2007: 534-543
2005
20	EE	Hans M. Jacobson, Pradip Bose, Zhigang Hu, Alper Buyuktosunoglu, Victor V. Zyuban, Rick Eickemeyer, Lee Eisen, John Griswell, Doug Logan, Balaram Sinharoy, Joel M. Tendler: Stretching the Limits of Clock-Gating Efficiency in Server-Class Processors. HPCA 2005: 238-242
19	EE	Rakesh Kumar, Victor V. Zyuban, Dean M. Tullsen: Interconnections in Multi-Core Architectures: Understanding Mechanisms, Overheads and Scaling. ISCA 2005: 408-419
2004
18	EE	Victor V. Zyuban, Sameh W. Asaad, Thomas W. Fox, Anne-Marie Haen, Daniel Littrell, Jaime H. Moreno: Design methodology for semi custom processor cores. ACM Great Lakes Symposium on VLSI 2004: 448-452
17	EE	Zhigang Hu, Alper Buyuktosunoglu, Viji Srinivasan, Victor V. Zyuban, Hans M. Jacobson, Pradip Bose: Microarchitectural techniques for power gating of execution units. ISLPED 2004: 32-37
16	EE	Victor V. Zyuban, David Brooks, Viji Srinivasan, Michael Gschwind, Pradip Bose, Philip N. Strenski, Philip G. Emma: Integrated Analysis of Power and Performance for Pipelined Microprocessors. IEEE Trans. Computers 53(8): 1004-1016 (2004)
2003
15	EE	Stephen V. Kosonocky, Azeez J. Bhavnagarwala, Kenneth Chin, George Gristede, Anne-Marie Haen, Wei Hwang, Mark B. Ketchen, Suhwan Kim, Daniel R. Knebel, Kevin W. Warren, Victor V. Zyuban: Low-power circuits and technology for wireless digital systems. IBM Journal of Research and Development 47(2-3): 283-298 (2003)
14	EE	Jaime H. Moreno, Victor V. Zyuban, Uzi Shvadron, Fredy D. Neeser, Jeff H. Derby, Malcolm S. Ware, Krishnan Kailas, Ayal Zaks, Amir B. Geva, Shay Ben-David, Sameh W. Asaad, Thomas W. Fox, Daniel Littrell, Marina Biberstein, Dorit Naishlos, Hillery C. Hunter: An innovative low-power high-performance programmable signal processor for digital communications. IBM Journal of Research and Development 47(2-3): 299-326 (2003)
13	EE	Victor V. Zyuban, Philip N. Strenski: Balancing hardware intensity in microprocessor pipelines. IBM Journal of Research and Development 47(5-6): 585-598 (2003)
12	EE	Victor V. Zyuban: Optimization of scannable latches for low energy. IEEE Trans. VLSI Syst. 11(5): 778-788 (2003)
2002
11	EE	Victor V. Zyuban: Unified architecture level energy-efficiency metric. ACM Great Lakes Symposium on VLSI 2002: 24-29
10	EE	Victor V. Zyuban, Philip N. Strenski: Unified methodology for resolving power-performance tradeoffs at the microarchitectural and circuit levels. ISLPED 2002: 166-171
9	EE	Victor V. Zyuban, Stephen V. Kosonocky: Low power integrated scan-retention mechanism. ISLPED 2002: 98-102
8	EE	Viji Srinivasan, David Brooks, Michael Gschwind, Pradip Bose, Victor V. Zyuban, Philip N. Strenski, Philip G. Emma: Optimizing pipelines for power and performance. MICRO 2002: 333-344
7	EE	Pradip Bose, David Brooks, Alper Buyuktosunoglu, Peter W. Cook, K. Das, Philip G. Emma, Michael Gschwind, Hans M. Jacobson, Tejas Karkhanis, Prabhakar Kudva, Stanley Schuster, James E. Smith, Viji Srinivasan, Victor V. Zyuban, David H. Albonesi, Sandhya Dwarkadas: Early-Stage Definition of LPX: A Low Power Issue-Execute Processor. PACS 2002: 1-17
2001
6	EE	Victor V. Zyuban, D. Meltzer: Clocking strategies and scannable latches for low power appliacations. ISLPED 2001: 346-351
5	EE	Victor V. Zyuban, Peter M. Kogge: Inherently Lower-Power High-Performance Superscalar Architectures. IEEE Trans. Computers 50(3): 268-285 (2001)
2000
4	EE	Victor V. Zyuban, Peter M. Kogge: Optimization of high-performance superscalar architectures for energy efficiency. ISLPED 2000: 84-89
3	EE	David Brooks, Pradip Bose, Stanley Schuster, Hans M. Jacobson, Prabhakar Kudva, Alper Buyuktosunoglu, John-David Wellman, Victor V. Zyuban, Manish Gupta, Peter W. Cook: Power-Aware Microarchitecture: Design and Modeling Challenges for Next-Generation Microprocessors. IEEE Micro 20(6): 26-44 (2000)
1999
2	EE	Victor V. Zyuban, Peter M. Kogge: Application of STD to latch-power estimation. IEEE Trans. VLSI Syst. 7(1): 111-115 (1999)
1998
1	EE	Victor V. Zyuban, Peter M. Kogge: The energy complexity of register files. ISLPED 1998: 305-310

Coauthor Index

1	David H. Albonesi	[7]
2	Sameh W. Asaad	[14] [18]
3	Shay Ben-David	[14]
4	Azeez J. Bhavnagarwala	[15]
5	Marina Biberstein	[14]
6	Pradip Bose	[3] [7] [8] [16] [17] [20] [21] [22]
7	David Brooks	[3] [7] [8] [16]
8	Alper Buyuktosunoglu	[3] [7] [17] [20]
9	Kenneth Chin	[15]
10	Peter W. Cook	[3] [7]
11	K. Das	[7]
12	Jeff H. Derby	[14]
13	Sandhya Dwarkadas	[7]
14	Rick Eickemeyer	[20]
15	Lee Eisen	[20]
16	Philip G. Emma	[7] [8] [16]
17	Thomas W. Fox	[14] [18]
18	Amir B. Geva	[14]
19	George Gristede	[15]
20	John Griswell	[20]
21	Michael Gschwind	[7] [8] [16]
22	Manish Gupta	[3]
23	Anne-Marie Haen	[15] [18]
24	Zhigang Hu	[17] [20] [21]
25	Hillery C. Hunter	[14]
26	Wei Hwang	[15]
27	Hans M. Jacobson	[3] [7] [17] [20]
28	Krishnan Kailas	[14]
29	Tejas Karkhanis	[7]
30	Mark B. Ketchen	[15]
31	Suhwan Kim	[15]
32	Daniel R. Knebel	[15]
33	Peter M. Kogge	[1] [2] [4] [5]
34	Stephen V. Kosonocky	[9] [15]
35	Prabhakar Kudva	[3] [7]
36	Rakesh Kumar	[19]
37	Daniel Littrell	[14] [18]
38	Doug Logan	[20]
39	D. Meltzer	[6]
40	Jaime H. Moreno	[14] [18]
41	Dorit Naishlos	[14]
42	Fredy D. Neeser	[14]
43	Timothy Mark Pinkston	[22]
44	Jude A. Rivers	[21]
45	Stanley Schuster	[3] [7]
46	Jeonghee Shin	[21] [22]
47	Uzi Shvadron	[14]
48	Balaram Sinharoy	[20]
49	James E. Smith	[7]
50	Viji Srinivasan	[7] [8] [16] [17]
51	Philip N. Strenski	[8] [10] [13] [16]
52	Joel M. Tendler	[20]
53	Dean M. Tullsen	[19]
54	Malcolm S. Ware	[14]
55	Kevin W. Warren	[15]
56	John-David Wellman	[3]
57	Ayal Zaks	[14]

Colors in the list of coauthors