2009 |
60 | EE | Man-Lap Li,
Pradeep Ramachandran,
Ulya R. Karpuzcu,
Siva Kumar Sastry Hari,
Sarita V. Adve:
Accurate microarchitecture-level fault modeling for studying hardware faults.
HPCA 2009: 105-116 |
2008 |
59 | EE | Man-Lap Li,
Pradeep Ramachandran,
Swarup Kumar Sahoo,
Sarita V. Adve,
Vikram S. Adve,
Yuanyuan Zhou:
Understanding the propagation of hard errors to software and implications for resilient system design.
ASPLOS 2008: 265-276 |
58 | EE | Man-Lap Li,
Pradeep Ramachandran,
Swarup Kumar Sahoo,
Sarita V. Adve,
Vikram S. Adve,
Yuanyuan Zhou:
Trace-based microarchitecture-level diagnosis of permanent hardware faults.
DSN 2008: 22-31 |
57 | EE | Swarup Kumar Sahoo,
Man-Lap Li,
Pradeep Ramachandran,
Sarita V. Adve,
Vikram S. Adve,
Yuanyuan Zhou:
Using likely program invariants to detect hardware errors.
DSN 2008: 70-79 |
56 | EE | Xiaodong Li,
Sarita V. Adve,
Pradip Bose,
Jude A. Rivers:
Online Estimation of Architectural Vulnerability Factor for Soft Errors.
ISCA 2008: 341-352 |
55 | EE | Pradeep Ramachandran,
Sarita V. Adve,
Pradip Bose,
Jude A. Rivers:
Metrics for Architecture-Level Lifetime Reliability Analysis.
ISPASS 2008: 202-212 |
54 | EE | Hans-Juergen Boehm,
Sarita V. Adve:
Foundations of the C++ concurrency memory model.
PLDI 2008: 68-78 |
53 | EE | Sarita V. Adve,
David Brooks,
Craig B. Zilles:
Guest Editors' Introduction: Top Picks from the Computer Architecture Conferences of 2007.
IEEE Micro 28(1): 8-11 (2008) |
2007 |
52 | EE | Xiaodong Li,
Sarita V. Adve,
Pradip Bose,
Jude A. Rivers:
Architecture-Level Soft Error Analysis: Examining the Limits of Common Assumptions.
DSN 2007: 266-275 |
51 | EE | Soyeon Park,
Weihang Jiang,
Yuanyuan Zhou,
Sarita V. Adve:
Managing energy-performance tradeoffs for multithreaded applications on multiprocessor architectures.
SIGMETRICS 2007: 169-180 |
50 | EE | Ruchira Sasanka,
Man-Lap Li,
Sarita V. Adve,
Yen-Kuang Chen,
Eric Debes:
ALP: Efficient support for all levels of parallelism for complex media applications.
TACO 4(1): (2007) |
49 | EE | Xiaodong Li,
Ritu Gupta,
Sarita V. Adve,
Yuanyuan Zhou:
Cross-component energy management: Joint adaptation of processor and memory.
TACO 4(3): (2007) |
2006 |
48 | EE | Wanghong Yuan,
Klara Nahrstedt,
Sarita V. Adve,
Douglas L. Jones,
Robin Kravets:
GRACE-1: Cross-Layer Adaptation for Multimedia Quality and Battery Energy.
IEEE Trans. Mob. Comput. 5(7): 799-815 (2006) |
2005 |
47 | EE | Xiaodong Li,
Sarita V. Adve,
Pradip Bose,
Jude A. Rivers:
SoftArch: An Architecture Level Tool for Modeling and Analyzing Soft Errors.
DSN 2005: 496-505 |
46 | EE | Jayanth Srinivasan,
Sarita V. Adve,
Pradip Bose,
Jude A. Rivers:
Exploiting Structural Duplication for Lifetime Reliability Enhancement.
ISCA 2005: 520-531 |
45 | EE | Jeremy Manson,
William Pugh,
Sarita V. Adve:
The Java memory model.
POPL 2005: 378-391 |
44 | EE | Jayanth Srinivasan,
Sarita V. Adve,
Pradip Bose,
Jude A. Rivers:
Lifetime Reliability: Toward an Architectural Solution.
IEEE Micro 25(3): 70-80 (2005) |
43 | EE | Sarita V. Adve,
Pia Sanda:
Guest Editors' Introduction: Reliability-Aware Microarchitecture.
IEEE Micro 25(6): 8-9 (2005) |
42 | EE | Christopher J. Hughes,
Sarita V. Adve:
Memory-side prefetching for linked data structures for processor-in-memory systems.
J. Parallel Distrib. Comput. 65(4): 448-463 (2005) |
41 | EE | Xiaodong Li,
Zhenmin Li,
Yuanyuan Zhou,
Sarita V. Adve:
Performance directed energy management for main memory and disks.
TOS 1(3): 346-380 (2005) |
2004 |
40 | EE | Xiaodong Li,
Zhenmin Li,
Francis M. David,
Pin Zhou,
Yuanyuan Zhou,
Sarita V. Adve,
Sanjeev Kumar:
Performance directed energy management for main memory and disks.
ASPLOS 2004: 271-283 |
39 | EE | Jayanth Srinivasan,
Sarita V. Adve,
Pradip Bose,
Jude A. Rivers:
The Impact of Technology Scaling on Lifetime Reliability.
DSN 2004: 177- |
38 | EE | Ruchira Sasanka,
Sarita V. Adve,
Yen-Kuang Chen,
Eric Debes:
The energy efficiency of CMP vs. SMT for multimedia workloads.
ICS 2004: 196-206 |
37 | EE | Gengbin Zheng,
Terry Wilmarth,
Orion Sky Lawlor,
Laxmikant V. Kalé,
Sarita V. Adve,
David A. Padua,
Philippe Guebelle:
Performance Modeling and Programming Environments for Petaflops Computers and the Blue Gene Machine.
IPDPS Next Generation Software Program - NSFNGS - PI Workshop 2004 |
36 | EE | Christopher J. Hughes,
Sarita V. Adve:
A Formal Approach to Frequent Energy Adaptations for Multimedia Applications.
ISCA 2004: 138-149 |
35 | EE | Jayanth Srinivasan,
Sarita V. Adve,
Pradip Bose,
Jude A. Rivers:
The Case for Lifetime Reliability-Aware Microprocessors.
ISCA 2004: 276-287 |
34 | EE | Xiaodong Li,
Zhenmin Li,
Pin Zhou,
Yuanyuan Zhou,
Sarita V. Adve,
Sanjeev Kumar:
Performance-Directed Energy Management for Storage Systems.
IEEE Micro 24(6): 38-49 (2004) |
2003 |
33 | | Daniel Grobe Sachs,
Sarita V. Adve,
Douglas L. Jones:
Cross-layer adaptive video coding to reduce energy on general-purpose processors.
ICIP (3) 2003: 109-112 |
32 | EE | Jayanth Srinivasan,
Sarita V. Adve:
Predictive dynamic thermal management for multimedia applications.
ICS 2003: 109-120 |
2002 |
31 | EE | Ruchira Sasanka,
Christopher J. Hughes,
Sarita V. Adve:
Joint local and global hardware adaptations for energy.
ASPLOS 2002: 144-155 |
30 | EE | Rohit Jain,
Christopher J. Hughes,
Sarita V. Adve:
Soft Real- Time Scheduling on Simultaneous Multithreaded Processors.
IEEE Real-Time Systems Symposium 2002: 134- |
29 | EE | Shubhendu S. Mukherjee,
Sarita V. Adve,
Todd M. Austin,
Joel S. Emer,
Peter S. Magnusson:
Performance Simulation Tools.
IEEE Computer 35(2): 38-39 (2002) |
28 | EE | Christopher J. Hughes,
Vijay S. Pai,
Parthasarathy Ranganathan,
Sarita V. Adve:
RSIM: Simulating Shared-Memory Multiprocessors with ILP Processors.
IEEE Computer 35(2): 40-49 (2002) |
2001 |
27 | EE | Vijay S. Pai,
Sarita V. Adve:
Comparing and Combining Read Miss Clustering and Software Prefetching.
IEEE PACT 2001: 292- |
26 | EE | Christopher J. Hughes,
Praful Kaul,
Sarita V. Adve,
Rohit Jain,
Chanik Park,
Jayanth Srinivasan:
Variability in the execution of multimedia applications and implications for architecture.
ISCA 2001: 254-265 |
25 | EE | Christopher J. Hughes,
Jayanth Srinivasan,
Sarita V. Adve:
Saving energy with architectural and frequency adaptations for multimedia applications.
MICRO 2001: 250-261 |
2000 |
24 | EE | Parthasarathy Ranganathan,
Sarita V. Adve,
Norman P. Jouppi:
Reconfigurable caches and their application to media processing.
ISCA 2000: 214-224 |
23 | EE | Vijay S. Pai,
Sarita V. Adve:
Code Transformations to Improve Memory Parallelism.
J. Instruction-Level Parallelism 2: (2000) |
1999 |
22 | EE | Murthy Durbhakula,
Vijay S. Pai,
Sarita V. Adve:
Improving the Accuracy vs. Speed Tradeoff for Simulating Shared-Memory Multiprocessors with ILP Processors.
HPCA 1999: 23-32 |
21 | EE | Parthasarathy Ranganathan,
Sarita V. Adve,
Norman P. Jouppi:
Performance of Image and Video Processing with General-Purpose Processors and Media ISA Extensions.
ISCA 1999: 124-135 |
20 | EE | Vijay S. Pai,
Sarita V. Adve:
Code Transformations to Improve Memory Parallelism.
MICRO 1999: 147- |
19 | EE | Vijay S. Pai,
Parthasarathy Ranganathan,
Hazim Abdel-Shafi,
Sarita V. Adve:
The Impact of Exploiting Instruction-Level Parallelism on Shared-Memory Multiprocessors.
IEEE Trans. Computers 48(2): 218-226 (1999) |
1998 |
18 | EE | Sarita V. Adve,
Mark D. Hill:
Weak Ordering - A New Definition.
25 Years ISCA: Retrospectives and Reprints 1998: 363-375 |
17 | EE | Sarita V. Adve,
Mark D. Hill:
Retrospective: Weak Ordering - A New Definition.
25 Years ISCA: Retrospectives and Reprints 1998: 63-66 |
16 | EE | Parthasarathy Ranganathan,
Kourosh Gharachorloo,
Sarita V. Adve,
Luiz André Barroso:
Performance of Database Workloads on Shared-Memory Systems with Out-of-Order Processors.
ASPLOS 1998: 307-318 |
15 | EE | Daniel J. Sorin,
Vijay S. Pai,
Sarita V. Adve,
Mary K. Vernon,
David A. Wood:
Analytic Evaluation of Shared-memory Systems with ILP Processors.
ISCA 1998: 380-391 |
1997 |
14 | EE | Hazim Abdel-Shafi,
Jonathan Hall,
Sarita V. Adve,
Vikram S. Adve:
An Evaluation of Fine-Grain Producer-Initiated Communication in Cache-Coherent Multiprocessors.
HPCA 1997: 204- |
13 | EE | Vijay S. Pai,
Parthasarathy Ranganathan,
Sarita V. Adve:
The Impact of Instruction-Level Parallelism on Multiprocessor Performance and Simulation Methodology.
HPCA 1997: 72-83 |
12 | EE | Parthasarathy Ranganathan,
Vijay S. Pai,
Hazim Abdel-Shafi,
Sarita V. Adve:
The Interaction of Software Prefetching with ILP Processors in Shared-Memory Systems.
ISCA 1997: 144-156 |
11 | EE | Parthasarathy Ranganathan,
Vijay S. Pai,
Sarita V. Adve:
Using Speculative Retirement and Larger Instruction Windows to Narrow the Performance Gap Between Memory Consistency Models.
SPAA 1997: 199-210 |
10 | | Sarita V. Adve,
Doug Burger,
Rudolf Eigenmann,
Alasdair Rawsthorne,
Michael D. Smith,
Catherine H. Gebotys,
Mahmut T. Kandemir,
David J. Lilja,
Alok N. Choudhary,
Jesse Zhixi Fang,
Pen-Chung Yew:
Changing Interaction of Compiler and Architecture.
IEEE Computer 30(12): 51-58 (1997) |
1996 |
9 | | Vijay S. Pai,
Parthasarathy Ranganathan,
Sarita V. Adve,
Tracy Harton:
An Evaluation of Memory Consistency Models for Shared-Memory Systems with ILP Processors.
ASPLOS 1996: 12-23 |
8 | EE | Sarita V. Adve,
Alan L. Cox,
Sandhya Dwarkadas,
Ramakrishnan Rajamony,
Willy Zwaenepoel:
A Comparison of Entry Consistency and Lazy Release Consistency Implementations.
HPCA 1996: 26-37 |
7 | | Sarita V. Adve,
Kourosh Gharachorloo:
Shared Memory Consistency Models: A Tutorial.
IEEE Computer 29(12): 66-76 (1996) |
1993 |
6 | EE | Sarita V. Adve,
Mark D. Hill:
A Unified Formalization of Four Shared-Memory Models.
IEEE Trans. Parallel Distrib. Syst. 4(6): 613-624 (1993) |
1992 |
5 | | Kourosh Gharachorloo,
Sarita V. Adve,
Anoop Gupta,
John L. Hennessy,
Mark D. Hill:
Programming for Different Memory Consistency Models.
J. Parallel Distrib. Comput. 15(4): 399-407 (1992) |
1991 |
4 | EE | Sarita V. Adve,
Mark D. Hill,
Barton P. Miller,
Robert H. B. Netzer:
Detecting Data Races on Weak Memory Systems.
ISCA 1991: 234-243 |
3 | EE | Sarita V. Adve,
Vikram S. Adve,
Mark D. Hill,
Mary K. Vernon:
Comparison of Hardware and Software Cache Coherence Schemes.
ISCA 1991: 298-308 |
1990 |
2 | | Sarita V. Adve,
Mark D. Hill:
Implementing Sequential Consistency in Cache-Based Systems.
ICPP (1) 1990: 47-50 |
1 | | Sarita V. Adve,
Mark D. Hill:
Weak Ordering - A New Definition.
ISCA 1990: 2-14 |