2008 | ||
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31 | Alex Ramírez, Gianfranco Bilardi, Michael Gschwind: Proceedings of the 5th Conference on Computing Frontiers, 2008, Ischia, Italy, May 5-7, 2008 ACM 2008 | |
30 | EE | Michael Gschwind: Optimizing data sharing and address translation for the Cell BE Heterogeneous Chip Multiprocessor. ICCD 2008: 478-485 |
29 | EE | Valentina Salapura, Karthik Ganesan, Alan Gara, Michael Gschwind, James C. Sexton, Robert Walkup: Next-Generation Performance Counters: Towards Monitoring Over Thousand Concurrent Events. ISPASS 2008: 139-146 |
28 | EE | Chen-Yong Cher, Michael Gschwind: Cell GC: using the cell synergistic processor as a garbage collection coprocessor. VEE 2008: 141-150 |
2007 | ||
27 | EE | Michael Gschwind, David Erb, Sid Manning, Mark Nutter: An Open Source Environment for Cell Broadband Engine System Software. IEEE Computer 40(6): 37-47 (2007) |
26 | EE | Michael Gschwind: The Cell Broadband Engine: Exploiting Multiple Levels of Parallelism in a Chip Multiprocessor. International Journal of Parallel Programming 35(3): 233-262 (2007) |
2006 | ||
25 | EE | Michael Gschwind: Chip multiprocessing and the cell broadband engine. Conf. Computing Frontiers 2006: 1-8 |
24 | EE | Alexandre E. Eichenberger, Kevin O'Brien, Kathryn M. O'Brien, Peng Wu, Tong Chen, Peter H. Oden, Daniel A. Prener, Janice C. Shepherd, Byoungro So, Zehra Sura, Amy Wang, Tao Zhang, Peng Zhao, Michael Gschwind, Roch Archambault, Yaoqing Gao, Roland Koo: Using advanced compiler technology to exploit the performance of the Cell Broadband EngineTM architecture. IBM Systems Journal 45(1): 59-84 (2006) |
23 | EE | Michael Gschwind, H. Peter Hofstee, Brian K. Flachs, Martin Hopkins, Yukio Watanabe, Takeshi Yamazaki: Synergistic Processing in Cell's Multicore Architecture. IEEE Micro 26(2): 10-24 (2006) |
2005 | ||
22 | EE | Valentina Salapura, Randy Bickford, Matthias A. Blumrich, Arthur A. Bright, Dong Chen, Paul Coteus, Alan Gara, Mark Giampapa, Michael Gschwind, Manish Gupta, Shawn Hall, Ruud A. Haring, Philip Heidelberger, Dirk Hoenicke, Gerard V. Kopcsay, Martin Ohmacht, Rick A. Rand, Todd Takken, Pavlos Vranas: Power and performance optimization at the system level. Conf. Computing Frontiers 2005: 125-132 |
21 | EE | Alexandre E. Eichenberger, Kathryn M. O'Brien, Kevin O'Brien, Peng Wu, Tong Chen, Peter H. Oden, Daniel A. Prener, Janice C. Shepherd, Byoungro So, Zehra Sura, Amy Wang, Tao Zhang, Peng Zhao, Michael Gschwind: Optimizing Compiler for the CELL Processor. IEEE PACT 2005: 161-172 |
2004 | ||
20 | EE | Victor V. Zyuban, David Brooks, Viji Srinivasan, Michael Gschwind, Pradip Bose, Philip N. Strenski, Philip G. Emma: Integrated Analysis of Power and Performance for Pipelined Microprocessors. IEEE Trans. Computers 53(8): 1004-1016 (2004) |
2003 | ||
19 | EE | David Brooks, Pradip Bose, Viji Srinivasan, Michael Gschwind, Philip G. Emma, Michael G. Rosenfield: New methodology for early-stage, microarchitecture-level power-performance analysis of microprocessors. IBM Journal of Research and Development 47(5-6): 653-670 (2003) |
2002 | ||
18 | EE | Michael Gschwind, Erik R. Altman: Precise Exception Semantics in Dynamic Compilation. CC 2002: 95-110 |
17 | EE | Viji Srinivasan, David Brooks, Michael Gschwind, Pradip Bose, Victor V. Zyuban, Philip N. Strenski, Philip G. Emma: Optimizing pipelines for power and performance. MICRO 2002: 333-344 |
16 | EE | Pradip Bose, David Brooks, Alper Buyuktosunoglu, Peter W. Cook, K. Das, Philip G. Emma, Michael Gschwind, Hans M. Jacobson, Tejas Karkhanis, Prabhakar Kudva, Stanley Schuster, James E. Smith, Viji Srinivasan, Victor V. Zyuban, David H. Albonesi, Sandhya Dwarkadas: Early-Stage Definition of LPX: A Low Power Issue-Execute Processor. PACS 2002: 1-17 |
2001 | ||
15 | EE | Kemal Ebcioglu, Erik R. Altman, Michael Gschwind, Sumedh W. Sathaye: Dynamic Binary Translation and Optimization. IEEE Trans. Computers 50(6): 529-548 (2001) |
14 | EE | Michael Gschwind, Valentina Salapura, D. Maurer: FPGA prototyping of a RISC processor core for embedded applications. IEEE Trans. VLSI Syst. 9(2): 241-250 (2001) |
13 | EE | Michael Gschwind, Erik R. Altman: Optimization and precise exceptions in dynamic compilation. SIGARCH Computer Architecture News 29(1): 66-74 (2001) |
2000 | ||
12 | EE | Michael Gschwind, Kemal Ebcioglu, Erik R. Altman, Sumedh W. Sathaye: Binary translation and architecture convergence issues for IBM system/390. ICS 2000: 336-347 |
11 | Michael Gschwind, Erik R. Altman, Sumedh W. Sathaye, Paul Ledak, David Appenzeller: Dynamic and Transparent Binary Translation. IEEE Computer 33(3): 54-59 (2000) | |
1999 | ||
10 | EE | Michael Gschwind: Instruction set selection for ASIP design. CODES 1999: 7-11 |
9 | EE | Kemal Ebcioglu, Erik R. Altman, Sumedh W. Sathaye, Michael Gschwind: Execution-Based Scheduling for VLIW Architectures. Euro-Par 1999: 1269-1280 |
8 | EE | Kemal Ebcioglu, Erik R. Altman, Sumedh W. Sathaye, Michael Gschwind: Optimizations and Oracle Parallelism with Dynamic Translation. MICRO 1999: 284- |
1998 | ||
7 | EE | Valentina Salapura, Michael Gschwind: Hardware/Software Co-Design of a Fuzzy RISC Processor. DATE 1998: 875-882 |
1996 | ||
6 | Michael Gschwind, Christian Mautner: Migration from Schematic-Based Designs to a VHDL Synthesis Environment. FPL 1996: 346-355 | |
1995 | ||
5 | Michael Gschwind, Valentina Salapura: A VHDL Design Methodology for FPGAs. FPL 1995: 208-217 | |
1994 | ||
4 | Valentina Salapura, Michael Gschwind, Oliver Maischberger: A Fast FPGA Implementation of a General Purpose Neuron. FPL 1994: 175-182 | |
3 | Michael Gschwind, Christian Mautner: The Design of a Stack-Based Microprocessor. FPL 1994: 326-331 | |
2 | EE | Michael Gschwind: Reprogrammable hardware for educational purposes. SIGCSE 1994: 183-187 |
1 | Michael Gschwind: FTP Access As a User-defined File System. Operating Systems Review 28(2): 73-80 (1994) |