| 2008 |
|---|
| 127 | EE | Nidhi Aggarwal,
Jason F. Cantin,
Mikko H. Lipasti,
James E. Smith:
Power-Efficient DRAM Speculation.
HPCA 2008: 317-328 |
| 126 | EE | Stijn Eyerman,
Lieven Eeckhout,
James E. Smith:
Studying Compiler Optimizations on Superscalar Processors Through Interval Analysis.
HiPEAC 2008: 114-129 |
| 125 | EE | Nidhi Aggarwal,
James E. Smith,
Kewal K. Saluja,
Norman P. Jouppi,
Parthasarathy Ranganathan:
Implementing high availability memory with a duplication cache.
MICRO 2008: 71-82 |
| 124 | EE | James E. Smith:
Self-Adaptation in Evolutionary Algorithms for Combinatorial Optimisation.
Adaptive and Multilevel Metaheuristics 2008: 31-57 |
| 2007 |
|---|
| 123 | EE | Marco Galluzzi,
Enrique Vallejo,
Adrián Cristal,
Fernando Vallejo,
Ramón Beivide,
Per Stenström,
James E. Smith,
Mateo Valero:
Implicit Transactional Memory in Kilo-Instruction Multiprocessors.
Asia-Pacific Computer Systems Architecture Conference 2007: 339-353 |
| 122 | EE | Tejas Karkhanis,
James E. Smith:
Automated design of application specific superscalar processors: an analytical approach.
ISCA 2007: 402-411 |
| 121 | EE | Nidhi Aggarwal,
Parthasarathy Ranganathan,
Norman P. Jouppi,
James E. Smith:
Configurable isolation: building high availability systems with commodity multi-core processors.
ISCA 2007: 470-481 |
| 120 | EE | Kyle J. Nesbit,
James Laudon,
James E. Smith:
Virtual private caches.
ISCA 2007: 57-68 |
| 119 | EE | Stijn Eyerman,
Lieven Eeckhout,
James E. Smith:
Studying Compiler-Microarchitecture Interactions through Interval Analysis.
PACT 2007: 406 |
| 118 | EE | Nidhi Aggarwal,
Parthasarathy Ranganathan,
Norman P. Jouppi,
James E. Smith:
Isolation in Commodity Multicore Processors.
IEEE Computer 40(6): 49-59 (2007) |
| 117 | EE | Stijn Eyerman,
Lieven Eeckhout,
Tejas Karkhanis,
James E. Smith:
A Top-Down Approach to Architecting CPI Component Performance Counters.
IEEE Micro 27(1): 84-93 (2007) |
| 2006 |
|---|
| 116 | EE | Stijn Eyerman,
Lieven Eeckhout,
Tejas Karkhanis,
James E. Smith:
A performance counter architecture for computing accurate CPI components.
ASPLOS 2006: 175-184 |
| 115 | EE | Jason F. Cantin,
Mikko H. Lipasti,
James E. Smith:
Stealth prefetching.
ASPLOS 2006: 274-282 |
| 114 | | Franz A. Pertl,
Andrew D. Lowery,
James E. Smith:
Numerical Wire Grid Modeling of Cavity Resonators to determine Quality Factors.
Computers and Their Applications 2006: 188-191 |
| 113 | EE | Shiliang Hu,
Ilhyun Kim,
Mikko H. Lipasti,
James E. Smith:
An approach for implementing efficient superscalar CISC processors.
HPCA 2006: 41-52 |
| 112 | EE | Shiliang Hu,
James E. Smith:
Reducing Startup Time in Co-Designed Virtual Machines.
ISCA 2006: 277-288 |
| 111 | EE | Stijn Eyerman,
James E. Smith,
Lieven Eeckhout:
Characterizing the branch misprediction penalty.
ISPASS 2006: 48-58 |
| 110 | EE | Kyle J. Nesbit,
Nidhi Aggarwal,
James Laudon,
James E. Smith:
Fair Queuing Memory Systems.
MICRO 2006: 208-222 |
| 109 | EE | Joshua J. Yi,
Lieven Eeckhout,
David J. Lilja,
Brad Calder,
Lizy Kurian John,
James E. Smith:
The Future of Simulation: A Field of Dreams.
IEEE Computer 39(11): 22-29 (2006) |
| 108 | EE | Jason F. Cantin,
James E. Smith,
Mikko H. Lipasti,
Andreas Moshovos,
Babak Falsafi:
Coarse-Grain Coherence Tracking: RegionScout and Region Coherence Arrays.
IEEE Micro 26(1): 70-79 (2006) |
| 107 | EE | Ashutosh S. Dhodapkar,
James E. Smith:
Tuning adaptive microarchitectures.
IJES 2(1/2): 39-50 (2006) |
| 2005 |
|---|
| 106 | EE | Ramon Canal,
Antonio González,
James E. Smith:
Value Compression for Efficient Computation.
Euro-Par 2005: 519-529 |
| 105 | EE | Jason F. Cantin,
Mikko H. Lipasti,
James E. Smith:
Improving Multiprocessor Performance with Coarse-Grain Coherence Tracking.
ISCA 2005: 246-257 |
| 104 | EE | Ajeet Shankar,
S. Subramanya Sastry,
Rastislav Bodík,
James E. Smith:
Runtime specialization with optimistic heap analysis.
OOPSLA 2005: 327-343 |
| 103 | EE | James E. Smith:
A unified view of virtualization.
VEE 2005: 1 |
| 102 | EE | James E. Smith,
Ravi Nair:
The Architecture of Virtual Machines.
IEEE Computer 38(5): 32-38 (2005) |
| 101 | EE | Kyle J. Nesbit,
James E. Smith:
Data Cache Prefetching Using a Global History Buffer.
IEEE Micro 25(1): 90-97 (2005) |
| 100 | EE | Jason F. Cantin,
Mikko H. Lipasti,
James E. Smith:
The Complexity of Verifying Memory Coherence and Consistency.
IEEE Trans. Parallel Distrib. Syst. 16(7): 663-671 (2005) |
| 2004 |
|---|
| 99 | EE | James E. Smith:
Some Real Observations on Virtual Machines.
Asia-Pacific Computer Systems Architecture Conference 2004: 1 |
| 98 | EE | Ramon Canal,
Antonio González,
James E. Smith:
Software-Controlled Operand-Gating.
CGO 2004: 125-136 |
| 97 | EE | Shiliang Hu,
James E. Smith:
Using Dynamic Binary Translation to Fuse Dependent Instructions.
CGO 2004: 213-226 |
| 96 | EE | Kim M. Hazelwood,
James E. Smith:
Exploring Code Cache Eviction Granularities in Dynamic Optimization Systems.
CGO 2004: 89-99 |
| 95 | EE | Kyle J. Nesbit,
James E. Smith:
Data Cache Prefetching Using a Global History Buffer.
HPCA 2004: 96-105 |
| 94 | EE | Kyle J. Nesbit,
Ashutosh S. Dhodapkar,
James E. Smith:
AC/DC: An Adaptive Data Cache Prefetcher.
IEEE PACT 2004: 135-145 |
| 93 | EE | Ashutosh S. Dhodapkar,
James E. Smith:
Tuning Reconfigurable Microarchitectures for Power Efficiency.
IPDPS 2004 |
| 92 | EE | Tejas Karkhanis,
James E. Smith:
A First-Order Superscalar Processor Model.
ISCA 2004: 338-349 |
| 91 | EE | Brad Calder,
Daniel Citron,
Yale N. Patt,
James E. Smith:
The future of simulation: A field of dreams.
ISPASS 2004: 169 |
| 2003 |
|---|
| 90 | EE | Ho-Seop Kim,
James E. Smith:
Dynamic Binary Translation for Accumulator-Oriented Architectures.
CGO 2003: 25-35 |
| 89 | EE | James E. Smith:
Keynote: Is there anything more to learn about high performance processors?
ICS 2003: 75 |
| 88 | EE | Ashutosh S. Dhodapkar,
James E. Smith:
Comparing Program Phase Detection Techniques.
MICRO 2003: 217-227 |
| 87 | EE | Ho-Seop Kim,
James E. Smith:
Hardware Support for Control Transfers in Code Caches.
MICRO 2003: 253-264 |
| 86 | | Gregory J. Thompson,
Zenovy S. Wowczuk,
James E. Smith,
Wade W. Huebsch,
Victor H. Mucino:
Numerical Modeling of School Bus Crash Scenarios.
Modelling, Identification and Control 2003: 378-384 |
| 85 | EE | Jason F. Cantin,
Mikko H. Lipasti,
James E. Smith:
The complexity of verifying memory coherence.
SPAA 2003: 254-255 |
| 84 | EE | Lieven Eeckhout,
Sébastien Nussbaum,
James E. Smith,
Koen De Bosschere:
Statistical Simulation: Adding Efficiency to the Computer Designer's Toolbox.
IEEE Micro 23(5): 26-38 (2003) |
| 2002 |
|---|
| 83 | EE | Sébastien Nussbaum,
James E. Smith:
Statistical Simulation of Symmetric Multiprocessor Systems.
Annual Simulation Symposium 2002: 89-97 |
| 82 | EE | Juan L. Aragón,
José González,
Antonio González,
James E. Smith:
Dual path instruction processing.
ICS 2002: 220-229 |
| 81 | EE | Ashutosh S. Dhodapkar,
James E. Smith:
Managing Multi-Configuration Hardware via Dynamic Working Set Analysis.
ISCA 2002: 233- |
| 80 | EE | Ho-Seop Kim,
James E. Smith:
An Instruction Set and Microarchitecture for Instruction Level Distributed Processing.
ISCA 2002: 71- |
| 79 | EE | Tejas Karkhanis,
James E. Smith,
Pradip Bose:
Saving energy with just in time instruction delivery.
ISLPED 2002: 178-183 |
| 78 | EE | Pradip Bose,
David Brooks,
Alper Buyuktosunoglu,
Peter W. Cook,
K. Das,
Philip G. Emma,
Michael Gschwind,
Hans M. Jacobson,
Tejas Karkhanis,
Prabhakar Kudva,
Stanley Schuster,
James E. Smith,
Viji Srinivasan,
Victor V. Zyuban,
David H. Albonesi,
Sandhya Dwarkadas:
Early-Stage Definition of LPX: A Low Power Issue-Execute Processor.
PACS 2002: 1-17 |
| 77 | EE | George Cai,
Ashutosh S. Dhodapkar,
James E. Smith:
Integrated Performance, Power, and Thermal Modeling.
Journal of Circuits, Systems, and Computers 11(6): 659- (2002) |
| 2001 |
|---|
| 76 | EE | Sébastien Nussbaum,
James E. Smith:
Modeling Superscalar Processors via Statistical Simulation.
IEEE PACT 2001: 15-24 |
| 75 | EE | S. Subramanya Sastry,
Rastislav Bodík,
James E. Smith:
Rapid profiling via stratified sampling.
ISCA 2001: 278-289 |
| 74 | EE | James E. Smith:
Instruction-Level Distributed Processing.
IEEE Computer 34(4): 59-65 (2001) |
| 73 | EE | T. N. Vijaykumar,
Sridhar Gopal,
James E. Smith,
Gurindar S. Sohi:
Speculative Versioning Cache.
IEEE Trans. Parallel Distrib. Syst. 12(12): 1305-1317 (2001) |
| 2000 |
|---|
| 72 | EE | James E. Smith:
Instruction Level Distributed Processing.
HiPC 2000: 245-258 |
| 71 | EE | James E. Smith,
Greg Faanes,
Rabin A. Sugumar:
Vector instruction set support for conditional operations.
ISCA 2000: 260-269 |
| 70 | EE | Quinn Jacobson,
James E. Smith:
Trace preconstruction.
ISCA 2000: 37-46 |
| 69 | EE | James E. Smith:
Instruction Level Distributed Processing: Adapting to Future Technology.
ISHPC 2000: 1-6 |
| 68 | | Timothy H. Heil,
James E. Smith:
Concurrent Garbage Collection UsingHardware-Assisted Profiling.
ISMM 2000: 80-93 |
| 67 | EE | Ramon Canal,
Antonio González,
James E. Smith:
Very low power pipelines using significance compression.
MICRO 2000: 181-190 |
| 66 | EE | Timothy H. Heil,
James E. Smith:
Relational profiling: enabling thread-level parallelism in virtual machines.
MICRO 2000: 281-290 |
| 65 | EE | Eric Rotenberg,
James E. Smith:
Control Independence in Trace Processors.
J. Instruction-Level Parallelism 2: (2000) |
| 1999 |
|---|
| 64 | EE | Eric Rotenberg,
Quinn Jacobson,
James E. Smith:
A Study of Control Independence in Superscalar Processors.
HPCA 1999: 115-124 |
| 63 | EE | Quinn Jacobson,
James E. Smith:
Instruction Pre-Processing in Trace Processors.
HPCA 1999: 125-129 |
| 62 | EE | Timothy H. Heil,
Zak Smith,
James E. Smith:
Improving Branch Predictors by Correlating on Data Values.
MICRO 1999: 28-37 |
| 61 | EE | Eric Rotenberg,
James E. Smith:
Control Independence in Trace Processors.
MICRO 1999: 4-15 |
| 60 | EE | Eric Rotenberg,
Steve Bennett,
James E. Smith:
A Trace Cache Microarchitecture and Evaluation.
IEEE Trans. Computers 48(2): 111-120 (1999) |
| 59 | | Yiannakis Sazeides,
James E. Smith:
Limits of Data Value Predictability.
International Journal of Parallel Programming 27(4): 229-256 (1999) |
| 1998 |
|---|
| 58 | EE | James E. Smith:
A Study of Branch Prediction Strategies.
25 Years ISCA: Retrospectives and Reprints 1998: 202-215 |
| 57 | EE | James E. Smith:
Retrospective: A Study of Branch Prediction Strategies.
25 Years ISCA: Retrospectives and Reprints 1998: 22-23 |
| 56 | EE | James E. Smith:
Decoupled Access/Execute Computer Architectures.
25 Years ISCA: Retrospectives and Reprints 1998: 231-238 |
| 55 | EE | James E. Smith:
Retrospective: Decoupled Access/Execute Architectures.
25 Years ISCA: Retrospectives and Reprints 1998: 27-28 |
| 54 | EE | James E. Smith,
Andrew R. Pleszkun:
Implementation of Precise Interupts in Pipelined Processors.
25 Years ISCA: Retrospectives and Reprints 1998: 291-299 |
| 53 | EE | James E. Smith:
Retrospective: Implementing Precise Interrupts in Pipelined Processors.
25 Years ISCA: Retrospectives and Reprints 1998: 42 |
| 52 | EE | Sridhar Gopal,
T. N. Vijaykumar,
James E. Smith,
Gurindar S. Sohi:
Speculative Versioning Cache.
HPCA 1998: 195-205 |
| 51 | EE | Yiannakis Sazeides,
James E. Smith:
Modeling Program Predictability.
ISCA 1998: 73-84 |
| 50 | EE | Roger Espasa,
Mateo Valero,
James E. Smith:
Vector Architectures: Past, Present and Future.
International Conference on Supercomputing 1998: 425-432 |
| 49 | | S. Subramanya Sastry,
Subbarao Palacharla,
James E. Smith:
Exploiting Idle Floating-Point Resources for Integer Execution.
PLDI 1998: 118-129 |
| 48 | | Wei-Chung Hsu,
James E. Smith:
A Performance Study of Instruction Cache Prefetching Methods.
IEEE Trans. Computers 47(5): 497-508 (1998) |
| 1997 |
|---|
| 47 | EE | Quinn Jacobson,
Steve Bennett,
Nikhil Sharma,
James E. Smith:
Control Flow Speculation in Multiscalar Processors.
HPCA 1997: 218-229 |
| 46 | EE | Subbarao Palacharla,
Norman P. Jouppi,
James E. Smith:
Complexity-Effective Superscalar Processors.
ISCA 1997: 206-218 |
| 45 | EE | Eric Rotenberg,
Quinn Jacobson,
Yiannakis Sazeides,
James E. Smith:
Trace Processors.
MICRO 1997: 138-148 |
| 44 | EE | Quinn Jacobson,
Eric Rotenberg,
James E. Smith:
Path-Based Next Trace Prediction.
MICRO 1997: 14-23 |
| 43 | EE | Roger Espasa,
Mateo Valero,
James E. Smith:
Out-of-Order Vector Architectures.
MICRO 1997: 160-170 |
| 42 | EE | Yiannakis Sazeides,
James E. Smith:
The Predictability of Data Values.
MICRO 1997: 248-258 |
| 41 | | James E. Smith,
Sriram Vajapeyam:
Trace Processors: Moving to Fourth-Generation Microarchitectures.
IEEE Computer 30(9): 68-74 (1997) |
| 1996 |
|---|
| 40 | EE | Erik Jacobsen,
Eric Rotenberg,
James E. Smith:
Assigning Confidence to Conditional Branch Predictions.
MICRO 1996: 142-152 |
| 39 | EE | Yiannakis Sazeides,
Stamatis Vassiliadis,
James E. Smith:
The Performance Potential of Data Dependence Speculation & Collapsing.
MICRO 1996: 238-247 |
| 38 | EE | Eric Rotenberg,
Steve Bennett,
James E. Smith:
Trace Cache: A Low Latency Approach to High Bandwidth Instruction Fetching.
MICRO 1996: 24-35 |
| 1995 |
|---|
| 37 | EE | Subbarao Palacharla,
James E. Smith:
Decoupling integer execution in superscalar processors.
MICRO 1995: 285-290 |
| 1994 |
|---|
| 36 | EE | Leonidas I. Kontothanassis,
Rabin A. Sugumar,
Greg Faanes,
James E. Smith,
Michael L. Scott:
Cache performance in vector supercomputers.
SC 1994: 255-264 |
| 35 | | James E. Smith,
Shlomo Weiss:
PowerPC 601 and Alpha 21064: A Tale of Two RISCs.
IEEE Computer 27(6): 46-58 (1994) |
| 1993 |
|---|
| 34 | | Wei-Chung Hsu,
James E. Smith:
Performance of Cached DRAM Organizations in Vector Supercomputers.
ISCA 1993: 327-336 |
| 1992 |
|---|
| 33 | | James E. Smith,
Wei-Chung Hsu:
Prefetching in Supercomputer Instruction Caches.
SC 1992: 588-597 |
| 32 | | Corinna G. Lee,
James E. Smith:
A Study of Partitioned Vector Register Files.
SC 1992: 94-103 |
| 31 | | Howard Jay Siegel,
Seth Abraham,
William L. Bain,
Kenneth E. Batcher,
Thomas L. Casavant,
Doug DeGroot,
Jack B. Dennis,
David C. Douglas,
Tse-Yun Feng,
James R. Goodman,
Alan Huang,
Harry F. Jordan,
J. Robert Jamp,
Yale N. Patt,
Alan Jay Smith,
James E. Smith,
Lawrence Snyder,
Harold S. Stone,
Russ Tuck,
Benjamin W. Wah:
Report of the Purdue Workshop on Grand Challenges in Computer Architecture for the Support of High Performance Computing.
J. Parallel Distrib. Comput. 16(3): 199-211 (1992) |
| 1990 |
|---|
| 30 | EE | James E. Smith,
Wei-Chung Hsu,
Christopher C. Hsiung:
Future general purpose supercomputer architectures.
SC 1990: 796-804 |
| 29 | EE | Shlomo Weiss,
James E. Smith:
A study of scalar compilation techniques for pipelined supercomputers.
ACM Trans. Math. Softw. 16(3): 223-245 (1990) |
| 1989 |
|---|
| 28 | EE | Gurindar S. Sohi,
James E. Smith,
James R. Goodman:
Restricted Fetch&Phi operations for parallel processing.
ICS 1989: 410-416 |
| 27 | | James E. Smith:
Dynamic Instruction Scheduling and the Astronautics ZS-1.
IEEE Computer 22(7): 21-35 (1989) |
| 1988 |
|---|
| 26 | | James E. Smith:
Characterizing Computer Performance with a Single Number.
Commun. ACM 31(10): 1202-1206 (1988) |
| 25 | | James E. Smith,
Andrew R. Pleszkun:
Implementing Precise Interrupts in Pipelined Processors.
IEEE Trans. Computers 37(5): 562-573 (1988) |
| 1987 |
|---|
| 24 | | Shlomo Weiss,
James E. Smith:
A Study of Scalar Compilation Techniques for Pipelined Supercomputers.
ASPLOS 1987: 105-109 |
| 23 | | James E. Smith,
G. E. Dermer,
B. D. Vanderwarn,
S. D. Klinger,
C. M. Rozewski,
D. L. Fowler,
K. R. Scidmore,
James Laudon:
The ZS-1 Central Processor.
ASPLOS 1987: 199-204 |
| 1986 |
|---|
| 22 | | Steven R. Kunkel,
James E. Smith:
Pipelined Register-Storage Architectures.
ICPP 1986: 515-518 |
| 21 | | Steven R. Kunkel,
James E. Smith:
Optimal Pipelining in Supercomputers.
ISCA 1986: 404-411 |
| 20 | | James E. Smith,
Shlomo Weiss,
Nicholas Y. Pang:
A Simulation Study of Decoupled Architecture Computers.
IEEE Trans. Computers 35(8): 692-702 (1986) |
| 1985 |
|---|
| 19 | | James E. Smith,
Andrew R. Pleszkun:
Implementation of Precise Interrupts in Pipelined Processors.
ISCA 1985: 36-44 |
| 18 | | Craig S. Holt,
James E. Smith:
Self-Diagnosis in Distributed Systems.
IEEE Trans. Computers 34(1): 19-32 (1985) |
| 17 | | James E. Smith,
James R. Goodman:
Instruction Cache Replacement Policies and Organizations.
IEEE Trans. Computers 34(3): 234-241 (1985) |
| 1984 |
|---|
| 16 | | Shlomo Weiss,
James E. Smith:
Instruction Issue Logic for Pipelined Supercomputers.
ISCA 1984: 110-118 |
| 15 | EE | James E. Smith:
Decoupled Access/Execute Computer Architectures
ACM Trans. Comput. Syst. 2(4): 289-308 (1984) |
| 14 | | Shlomo Weiss,
James E. Smith:
Instruction Issue Logic in Pipelined Supercomputers.
IEEE Trans. Computers 33(11): 1013-1022 (1984) |
| 13 | | James E. Smith:
On Separable Unordered Codes.
IEEE Trans. Computers 33(8): 741-743 (1984) |
| 1983 |
|---|
| 12 | | James E. Smith,
James R. Goodman:
A Study of Instruction Cache Organizations and Replacement Policies
ISCA 1983: 132-137 |
| 11 | | James E. Smith,
Paklin Lam:
A Theory of Totally Self-Checking System Design.
IEEE Trans. Computers 32(9): 831-844 (1983) |
| 1982 |
|---|
| 10 | EE | James E. Smith:
Decoupled access/execute computer architectures.
ISCA 1982: 112-119 |
| 1981 |
|---|
| 9 | | James E. Smith:
A Study of Branch Prediction Strategies.
ISCA 1981: 135-148 |
| 8 | | Craig S. Holt,
James E. Smith:
Diagnosis of Systems with Asymmetric Invalidation.
IEEE Trans. Computers 30(9): 679-690 (1981) |
| 1980 |
|---|
| 7 | | James E. Smith:
Measures of the Effectiveness of Fault Signature Analysis.
IEEE Trans. Computers 29(6): 510-514 (1980) |
| 1979 |
|---|
| 6 | | James E. Smith:
On Necessary and Sufficient Conditions for Multiple Fault Undetectability.
IEEE Trans. Computers 28(10): 801-802 (1979) |
| 5 | | James E. Smith:
Detection of Faults in Programmable Logic Arrays.
IEEE Trans. Computers 28(11): 845-853 (1979) |
| 4 | | James E. Smith:
Comments on ``Redundancy Testing in Combinational Networks''.
IEEE Trans. Computers 28(3): 261-262 (1979) |
| 3 | | James E. Smith:
Universal System Diagnosis Algorithms.
IEEE Trans. Computers 28(5): 374-378 (1979) |
| 1978 |
|---|
| 2 | | James E. Smith:
On the Existence of Combinational Logic Circuits Exhibiting Multiple Redundancy.
IEEE Trans. Computers 27(12): 1221-1226 (1978) |
| 1 | | James E. Smith,
Gernot Metze:
Strongly Fault Secure Logic Networks.
IEEE Trans. Computers 27(6): 491-499 (1978) |
