35. ISCA 2008:
Beijing,
China
35th International Symposium on Computer Architecture (ISCA 2008), June 21-25, 2008, Beijing, China.
IEEE 2008 BibTeX
Novel Microarchitectures - Part I
- Francis Tseng, Yale N. Patt:
Achieving Out-of-Order Performance with Almost In-Order Complexity.
3-12
Electronic Edition (link) BibTeX
- Mayank Agarwal, Nitin Navale, Kshitiz Malik, Matthew I. Frank:
Fetch-Criticality Reduction through Control Independence.
13-24
Electronic Edition (link) BibTeX
- Miquel Pericàs, Adrián Cristal, Francisco J. Cazorla, Ruden González, Alexander V. Veidenbaum, Daniel A. Jiménez, Mateo Valero:
A Two-Level Load/Store Queue Based on Execution Locality.
25-36
Electronic Edition (link) BibTeX
Novel Memory Systems
Interconnect Networks - Part I
Transactional Memory
Emergent Technology
- Dana Vantrease, Robert Schreiber, Matteo Monchiero, Moray McLaren, Norman P. Jouppi, Marco Fiorentino, Al Davis, Nathan L. Binkert, Raymond G. Beausoleil, Jung Ho Ahn:
Corona: System Implications of Emerging Nanophotonic Technology.
153-164
Electronic Edition (link) BibTeX
- Lucas Kreger-Stickles, Mark Oskin:
Microcoded Architectures for Ion-Tap Quantum Computers.
165-176
Electronic Edition (link) BibTeX
- Nemanja Isailovic, Mark Whitney, Yatish Patel, John Kubiatowicz:
Running a Quantum Circuit at the Speed of Data.
177-188
Electronic Edition (link) BibTeX
Novel Microarchitectures - Part II
Interconnect Networks - Part II
- Natalie D. Enright Jerger, Li-Shiuan Peh, Mikko H. Lipasti:
Virtual Circuit Tree Multicasting: A Case for On-Chip Hardware Multicast Support.
229-240
Electronic Edition (link) BibTeX
- Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri:
iDEAL: Inter-router Dual-Function Energy and Area-Efficient Links for Network-on-Chip (NoC) Architectures.
241-250
Electronic Edition (link) BibTeX
- Dongkook Park, Soumya Eachempati, Reetuparna Das, Asit K. Mishra, Yuan Xie, Narayanan Vijaykrishnan, Chita R. Das:
MIRA: A Multi-layered On-Chip Interconnect Router Architecture.
251-261
Electronic Edition (link) BibTeX
Debugging Parallel Programs
System Architecture and I/O
Reliability
Application Acceleration
- Shimin Chen, Michael Kozuch, Theodoros Strigkos, Babak Falsafi, Phillip B. Gibbons, Todd C. Mowry, Vijaya Ramachandran, Olatunji Ruwase, Michael Ryan, Evangelos Vlachos:
Flexible Hardware Acceleration for Instruction-Grain Program Monitoring.
377-388
Electronic Edition (link) BibTeX
- Nathan Clark, Amir Hormati, Scott A. Mahlke:
VEAL: Virtualized Execution Accelerator for Loops.
389-400
Electronic Edition (link) BibTeX
- Haibo Chen, Xi Wu, Liwei Yuan, Binyu Zang, Pen-Chung Yew, Frederic T. Chong:
From Speculation to Security: Practical and Efficient Information Flow Tracking Using Speculative Hardware.
401-412
Electronic Edition (link) BibTeX
Performance Evaluation
- Carlos Boneti, Francisco J. Cazorla, Roberto Gioiosa, Alper Buyuktosunoglu, Chen-Yong Cher, Mateo Valero:
Software-Controlled Priority Characterization of POWER5 Processor.
415-426
Electronic Edition (link) BibTeX
- Alex Shye, Berkin Özisikyilmaz, Arindam Mallik, Gokhan Memik, Peter A. Dinda, Robert P. Dick, Alok N. Choudhary:
Learning and Leveraging the Relationship between Architecture-Level Measurements and Individual User Satisfaction.
427-438
Electronic Edition (link) BibTeX
Multi-core/Many-core Design
Copyright © Sat May 16 23:24:58 2009
by Michael Ley (ley@uni-trier.de)