2008 |
6 | EE | Aman Gayasen,
Narayanan Vijaykrishnan,
Mahmut T. Kandemir,
Arifur Rahman:
Designing a 3-D FPGA: Switch Box Architecture and Thermal Issues.
IEEE Trans. VLSI Syst. 16(7): 882-893 (2008) |
2004 |
5 | EE | Arifur Rahman,
Vijay Polavarapuv:
Evaluation of low-leakage design techniques for field programmable gate arrays.
FPGA 2004: 23-30 |
2003 |
4 | | Arifur Rahman:
Models for Full-Chip Power Dissipation in Field Programmable Gate Arrays and the Impact of Subthreshold Leakage Current.
VLSI 2003: 97-106 |
3 | EE | Arifur Rahman,
Shamik Das,
Anantha P. Chandrakasan,
Rafael Reif:
Wiring requirement and three-dimensional integration technology for field programmable gate arrays.
IEEE Trans. VLSI Syst. 11(1): 44-54 (2003) |
2001 |
2 | EE | Arifur Rahman,
Shamik Das,
Anantha Chandrakasan,
Rafael Reif:
Wiring requirement and three-dimensional integration of field-programmable gate arrays.
SLIP 2001: 107-113 |
2000 |
1 | EE | Arifur Rahman,
Rafael Reif:
System-level performance evaluation of three-dimensional integrated circuits.
IEEE Trans. VLSI Syst. 8(6): 671-678 (2000) |