2008 |
15 | EE | Abner Correa Barros,
Victor Wanderley Costa Medeiros,
Viviane Lucy Santos Souza,
Paulo Sérgio Brandão Nascimento,
Ângelo Mazer,
João Paulo Barbosa,
Bruno P. Neves,
Ismael Santos,
Manoel Eusebio de Lima:
Implementation of a double-precision multiplier accumulator with exception treatment to a dense matrix multiplier module in FPGA.
SBCCI 2008: 40-45 |
2007 |
14 | EE | Jordana L. Seixas,
Edson Barbosa,
Stelita M. da Silva,
Paulo Sérgio B. do Nascimento,
Vinícius Kursancew,
Remy Eskinazi Sant'Anna,
Edna Barros,
Manoel Eusebio de Lima:
Aquarius: a dynamically reconfigurable computing platform.
SBCCI 2007: 171-176 |
2006 |
13 | EE | Paulo Sérgio B. do Nascimento,
Manoel Eusebio de Lima:
Temporal partitioning for image processing based on time-space complexity in reconfigurable architectures.
DATE 2006: 375-380 |
12 | EE | A. G. Silva-Filho,
F. R. Cordeiro,
Remy Eskinazi Sant'Anna,
Manoel Eusebio de Lima:
Heuristic for Two-Level Cache Hierarchy Exploration Considering Energy Consumption and Performance.
PATMOS 2006: 75-83 |
11 | EE | Abel Guilhermino S. Filho,
Pablo Viana,
Edna Barros,
Manoel Eusebio de Lima:
Tuning Mechanism for Two-Level Cache Hierarchy Intended for Instruction Caches and Low Energy Consumption.
SBAC-PAD 2006: 125-132 |
10 | EE | Paulo Sérgio B. do Nascimento,
Manoel Eusebio de Lima,
Stelita M. da Silva,
Jordana L. Seixas:
Mapping of image processing systems to FPGA computer based on temporal partitioning and design space exploration.
SBCCI 2006: 50-55 |
2005 |
9 | EE | Remy Eskinazi Sant'Anna,
Manoel Eusebio de Lima,
Paulo Romero Martins Maciel,
Carlos A. Valderrama,
Abel Guilhermino S. Filho,
Paulo Sérgio B. do Nascimento:
A petri-net based Pre-runtime scheduler for dynamically self-reconfiguration of FPGAs (abstract only).
FPGA 2005: 262 |
8 | EE | Paulo Sérgio B. do Nascimento,
Paulo Romero Martins Maciel,
Manoel Eusebio de Lima,
Remy Eskinazi Sant'Anna,
Abel Guilhermino S. Filho:
A partial reconfigurable FPGA implementation for industrial controllers using SFC-petri net description (abstract only).
FPGA 2005: 275 |
7 | EE | Remy Eskinazi Sant'Anna,
Manoel Eusebio de Lima,
Paulo Romero Martins Maciel,
Carlos A. Valderrama,
Abel Guilhermino S. Filho,
Paulo Sérgio B. do Nascimento:
A Timed Petri Net Approach for Pre-Runtime Scheduling in Partial and Dynamic Reconfigurable Systems.
IPDPS 2005 |
6 | EE | Abner Correa Barros,
Pericles Lima,
Juliana Xavier,
Manoel Eusebio de Lima:
Teaching SoC Design in a Project-Oriented Course Based on Robotics.
MSE 2005: 25-26 |
2004 |
5 | EE | Remy Eskinazi Sant'Anna,
Manoel Eusebio de Lima,
Paulo Romero Martins Maciel:
A left-edge algorithm approach for scheduling and allocation of hardware contexts in dynamically reconfigurable architectures.
FPGA 2004: 259 |
4 | EE | Paulo Sérgio B. do Nascimento,
Paulo Romero Martins Maciel,
Manoel Eusebio de Lima,
Remy Eskinazi Sant'Anna,
Abel Guilhermino S. Filho:
A partial reconfigurable architecture for controllers based on Petri nets.
SBCCI 2004: 16-21 |
2003 |
3 | EE | Julio A. de Oliveira Filho,
Manoel Eusebio de Lima,
Paulo Romero Martins Maciel:
Petri Net Based Interface Analysis for Fast IP-Core Integration.
MEMOCODE 2003: 34- |
2 | EE | Julio A. de Oliveira Filho,
Manoel Eusebio de Lima,
Paulo Romero Martins Maciel,
Juliana Moura,
Bruno Celso:
A Fast IP-Core Integration Methodology for SoC Design.
SBCCI 2003: 131-136 |
1 | EE | Abel Guilhermino S. Filho,
Alejandro César Frery,
Cristiano C. de Araujo,
Haglay Alice,
Jorge Cerqueira,
Juliana A. Loureiro,
Manoel Eusebio de Lima,
Maria das Gracas S. Oliveira,
Michelle Matos Horta:
Hyperspectral Images Clustering on Reconfigurable Hardware Using the K-Means Algorithm.
SBCCI 2003: 99-104 |