Ron Sass

Ron R. Sass

2009
32	EE	Robin Pottathuparambil, Ron Sass: A parallel/vectorized double-precision exponential core to accelerate computational science applications. FPGA 2009: 285
2008
31	EE	Yamuna Rajasekhar, Yashodhan Phatak, Andrew G. Schmidt, William V. Kritikos, Ron Sass: FPGA Session Control (FSC): Providing Remote Access to a Cluster of FPGAs. FCCM 2008: 298-299
30	EE	Andrew G. Schmidt, William V. Kritikos, Siddhartha Datta, Ron Sass: Reconfigurable Computing Cluster Project: Phase I Brief. FCCM 2008: 300-301
29	EE	Yamuna Rajasekhar, William V. Kritikos, Andrew G. Schmidt, Ron Sass: Teaching FPGA system design via a remote laboratory facility. FPL 2008: 687-690
28	EE	David L. Andrews, Ron Sass, Erik Anderson, Jason Agron, Wesley Peck, Jim Stevens, Fabrice Baijot, Ed Komp: Achieving Programming Model Abstractions for Reconfigurable Computing. IEEE Trans. VLSI Syst. 16(1): 34-44 (2008)
2007
27	EE	Ron Sass, William V. Kritikos, Andrew G. Schmidt, Srinivas Beeravolu, Parag Beeraka: Reconfigurable Computing Cluster (RCC) Project: Investigating the Feasibility of FPGA-Based Petascale Computing. FCCM 2007: 127-140
26	EE	Andrew G. Schmidt, Ron Sass: Quantifying Effective Memory Bandwidth of Platform FPGAs. FCCM 2007: 337-338
25	EE	Kushal Datta, Ron Sass: RBoot: Software Infrastructure for a Remote FPGA Laboratory. FCCM 2007: 343-344
24	EE	Andrew G. Schmidt, Ron Sass: Characterizing Effective Memory Bandwidth of Designs with Concurrent High-Performance Computing Cores. FPL 2007: 601-604
2006
23		David L. Andrews, Ron Sass, Erik Anderson, Jason Agron, Wesley Peck, Jim Stevens, Fabrice Baijot, Ed Komp: The Case for High Level Programming Models for Reconfigurable Computers. ERSA 2006: 21-32
22	EE	Erik Anderson, Jason Agron, Wesley Peck, Jim Stevens, Fabrice Baijot, Ed Komp, Ron Sass, David L. Andrews: Enabling a Uniform Programming Model Across the Software/Hardware Boundary. FCCM 2006: 89-98
21	EE	Jason Agron, Wesley Peck, Erik Anderson, David L. Andrews, Ed Komp, Ron Sass, Fabrice Baijot, Jim Stevens: Run-Time Services for Hybrid CPU/FPGA Systems on Chip. RTSS 2006: 3-12
20	EE	Ron Sass, Brian Greskamp, Brian Leonard, Jeff Young, Srinivas Beeravolu: Online architectures: A theoretical formulation and experimental prototype. Microprocessors and Microsystems 30(6): 319-333 (2006)
2005
19	EE	Brian Greskamp, Ron Sass: A Virtual Machine for Merit-Based Runtime Reconfiguration. FCCM 2005: 287-288
18	EE	Pradeep Nalabalapu, Ron Sass: Bandwidth Management with a Reconfigurable Data Cache. IPDPS 2005
17	EE	Krishna Muriki, Keith D. Underwood, Ron Sass: RC-BLAST: Towards a Portable, Cost-Effective Open Source Hardware Implementation. IPDPS 2005
2004
16	EE	Jeff Young, Ron Sass: FERP Interface and Interconnect Cores for Stream Processing Applications. EUC 2004: 291-300
15	EE	Ranjesh G. Jaganathan, Matthew Simpson, Ron Sass: Automatic discovery, selection, and specialization of modules in RCADE. FPGA 2004: 256
14	EE	Brian Leonard, Jeff Young, Ron Sass: Online placement infrastructure to support run-time reconfiguration. FPGA 2004: 256
13	EE	Nathan DeBardeleben, Walter B. Ligon III, Ron Sass: Arches: An Infrastructure for PSE Development. HIPS 2004: 120-128
12	EE	Nathan DeBardeleben, Walter B. Ligon III, Ron Sass: Arches: An Infrastructure for PSE Development. IPDPS 2004: 120-128
11	EE	Keith D. Underwood, Walter B. Ligon III, Ron R. Sass: An Analysis of the Cost Effectiveness of an Adaptable Computing Cluster. Cluster Computing 7(4): 357-371 (2004)
2003
10	EE	Ranjesh G. Jaganathan, Keith D. Underwood, Ron R. Sass: A Configurable Network Protocol for Cluster Based Communications using Modular Hardware Primitives on an Intelligent NIC. FCCM 2003: 286-287
9	EE	Shyamnath Harinath, Ron Sass: Reconfigurable Mapping Functions for Online Architectures. IPDPS 2003: 173
8	EE	Ranjesh G. Jaganathan, Keith D. Underwood, Ron Sass: A Configurable Network Protocol for Cluster Based Communications using Modular Hardware Primitives on an Intelligent NIC. SC 2003: 22
7		Keith D. Underwood, Walter B. Ligon III, Ron Sass: Analysis of a prototype intelligent network interface. Concurrency and Computation: Practice and Experience 15(7-8): 751-777 (2003)
2001
6	EE	Keith D. Underwood, Ron Sass, Walter B. Ligon III: A Reconfigurable Extension to the Network Interface of Beowulf Clusters. CLUSTER 2001: 212-
5	EE	Keith D. Underwood, Ron R. Sass, Walter B. Ligon III: Cost effectiveness of an adaptable computing cluster. SC 2001: 54
1995
4		Marwan Krunz, Ron Sass, Herman D. Hughes: Statistical Characteristics and Multiplexing of MPEG Streams. INFOCOM 1995: 455-462
1994
3		Ron Sass, Matt W. Mutka: Transformations on Doubly Nested Loops. IFIP PACT 1994: 343-346
2	EE	Ron Sass, Matt W. Mutka: Enabling unimodular transformations. SC 1994: 753-762
1993
1		Chi-Ming Chiang, Qiang Du, Matt W. Mutka, Ron Sass: An Empirical Study of Scalable Domain Decomposition Methods for a 2-D Parabolic Equation Solver. PPSC 1993: 687-690

Coauthor Index

1	Jason Agron	[21] [22] [23] [28]
2	Erik Anderson	[21] [22] [23] [28]
3	David L. Andrews	[21] [22] [23] [28]
4	Fabrice Baijot	[21] [22] [23] [28]
5	Parag Beeraka	[27]
6	Srinivas Beeravolu	[20] [27]
7	Chi-Ming Chiang	[1]
8	Kushal Datta	[25]
9	Siddhartha Datta	[30]
10	Nathan DeBardeleben	[12] [13]
11	Qiang Du	[1]
12	Brian Greskamp	[19] [20]
13	Shyamnath Harinath	[9]
14	Herman D. Hughes	[4]
15	Ranjesh G. Jaganathan	[8] [10] [15]
16	Ed Komp	[21] [22] [23] [28]
17	William V. Kritikos	[27] [29] [30] [31]
18	Marwan Krunz	[4]
19	Brian Leonard	[14] [20]
20	Walter B. Ligon III	[5] [6] [7] [11] [12] [13]
21	Krishna Muriki	[17]
22	Matt W. Mutka	[1] [2] [3]
23	Pradeep Nalabalapu	[18]
24	Wesley Peck	[21] [22] [23] [28]
25	Yashodhan Phatak	[31]
26	Robin Pottathuparambil	[32]
27	Yamuna Rajasekhar	[29] [31]
28	Andrew G. Schmidt	[24] [26] [27] [29] [30] [31]
29	Matthew Simpson	[15]
30	Jim Stevens	[21] [22] [23] [28]
31	Keith D. Underwood	[5] [6] [7] [8] [10] [11] [17]
32	Jeff Young	[14] [16] [20]

Colors in the list of coauthors