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Sangjin Hong

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2007
26EESangkil Jung, Sangjin Hong, Kyungtae Kim, Junghoon Jee, Eunah Kim: Voice Transmission Enhancing Model on Wireless Mesh Networks. ICC 2007: 4949-4954
25EEJinseok Lee, Kyoung-Su Park, Sangjin Hong, We-Duke Cho: Object Tracking Based on RFID Coverage Visual Compensation in Wireless Sensor Network. ISCAS 2007: 1597-1600
24EESangkil Jung, Sangjin Hong, Kyungtae Kim: On Achieving High Performance Wireless Mesh Networks With Data Fusion. WOWMOM 2007: 1-8
23EEJun-Hee Mun, Shung Han Cho, Sangjin Hong: Flexible Controller Design and Its Application for Concurrent Execution of Buffer Centric Dataflows. VLSI Signal Processing 47(3): 233-257 (2007)
2006
22EEKyoung-Su Park, Sangjin Hong, Peom Park: Spectral Content Characterization for Efficient Image Detection Algorithm Design. CIT 2006: 137
21EEJinseok Lee, Jaechan Lim, Sangjin Hong, Peom Park: Tracking an Object in 3-D Space using Particle Filtering based on Sensor Array. CIT 2006: 242
20EESangkil Jung, Sangjin Hong, Peom Park: Effect of RObust Header Compression (ROHC) and Packet Aggregation on Multi-hop Wireless Mesh Networks. CIT 2006: 91
19EEJaechan Lim, Jinseok Lee, Sangjin Hong, Peom Park: Algorithm for Detection with Localization of Multi-targets in Wireless Acoustic Sensor Networks. ICTAI 2006: 547-554
18EEKyungtae Kim, Samrat Ganguly, Rauf Izmailov, Sangjin Hong: On Packet Aggregation Mechanisms for Improving VoIP Quality in Mesh Networks. VTC Spring 2006: 891-895
17EESamrat Ganguly, Vishnu Navda, Kyungtae Kim, Anand Kashyap, Dragor Niculescu, Rauf Izmailov, Sangjin Hong, Samir R. Das: Performance Optimizations for Deploying VoIP Services in Mesh Networks. IEEE Journal on Selected Areas in Communications 24(11): 2147-2158 (2006)
16EESangjin Hong, Kyoung-Su Park, Jun-Hee Mun: Design and implementation of a high-speed matrix multiplier based on word-width decomposition. IEEE Trans. VLSI Syst. 14(4): 380-392 (2006)
15EESangjin Hong, Petar M. Djuric: High-throughput scalable parallel resampling mechanism for effective redistribution of particles. IEEE Transactions on Signal Processing 54(3): 1144-1155 (2006)
14EESangjin Hong, Shu-Shin Chin, Petar M. Djuric, Miodrag Bolic: Design and Implementation of Flexible Resampling Mechanism for High-Speed Parallel Particle Filters. VLSI Signal Processing 44(1-2): 47-62 (2006)
2005
13EEXiaoyao Liang, Akshay Athalye, Sangjin Hong: Equalizing data-path for processing speed determination in block level pipelining. ISCAS (2) 2005: 1646-1649
12EEXiaoyao Liang, Akshay Athalye, Sangjin Hong: Dynamic coarse grain dataflow reconfiguration technique for real-time systems design. ISCAS (4) 2005: 3511-3514
11EEMiodrag Bolic, Petar M. Djuric, Sangjin Hong: Resampling algorithms and architectures for distributed particle filters. IEEE Transactions on Signal Processing 53(7): 2442-2450 (2005)
10EESangjin Hong, Shu-Shin Chin: Domain Specific Reconfigurable Processing Core Architecture for Digital Filtering Applications. VLSI Signal Processing 40(2): 239-259 (2005)
2004
9EEMagesh Sadasivam, Sangjin Hong: Dynamically reconfigurable architecture for high-throughput processing of data centric applications. FPGA 2004: 254
8 Sangjin Hong, Miodrag Bolic, Petar M. Djuric: A design complexity comparison method for loop-based signal processing algorithms: particle filters. ISCAS (2) 2004: 693-696
7 Sangjin Hong, Shu-Shin Chin, Magesh Sadasivam: Glitching power reduction through supply voltage adaptation mechanism for low power array structure design. ISCAS (2) 2004: 733-736
6EEShu-Shin Chin, Sangjin Hong, Suhwan Kim: Usage of Application-Specific Switching Activity for Energy Minimization of Arithmetic Units. ISVLSI 2004: 158-166
5EESangjin Hong, Shu-Shin Chin: Incorporating Power Reduction Mechanism in Arithmetic Core Design. ISVLSI 2004: 249-250
4EEMagesh Sadasivam, Sangjin Hong: Autonomous Buffer Controller Design for Concurrent Execution in Block Level Pipelined Dataflow. ISVLSI 2004: 303-304
3EESangjin Hong, Shu-Shin Chin, Suhwan Kim, Wei Hwang: Power Reduction Technique in Coefficient Multiplications Through Multiplier Characterization. VLSI Signal Processing 38(2): 101-113 (2004)
2003
2EEMagesh Sadasivam, Sangjin Hong: Application Specific Coarse-Grained FPGA for Processing Element in Real-Time Parallel Particle Filters. IWSOC 2003: 116-119
2000
1EESangjin Hong, Wayne E. Stark: Design and Implementation of a Low Complexity VLSI Turbo-Code Decoder Architecture for Low Energy Mobile Wireless Communications. VLSI Signal Processing 24(1): 43-57 (2000)

Coauthor Index

1Akshay Athalye [12] [13]
2Miodrag Bolic [8] [11] [14]
3Shu-Shin Chin [3] [5] [6] [7] [10] [14]
4Shung Han Cho [23]
5We-Duke Cho [25]
6Samir R. Das [17]
7Petar M. Djuric [8] [11] [14] [15]
8Samrat Ganguly [17] [18]
9Wei Hwang [3]
10Rauf Izmailov [17] [18]
11Junghoon Jee [26]
12Sangkil Jung [20] [24] [26]
13Anand Kashyap [17]
14Eunah Kim [26]
15Kyungtae Kim [17] [18] [24] [26]
16Suhwan Kim [3] [6]
17Jinseok Lee [19] [21] [25]
18Xiaoyao Liang [12] [13]
19Jaechan Lim [19] [21]
20Jun-Hee Mun [16] [23]
21Vishnu Navda [17]
22Dragor Niculescu [17]
23Kyoung-Su Park [16] [22] [25]
24Peom Park [19] [20] [21] [22]
25Magesh Sadasivam [2] [4] [7] [9]
26Wayne E. Stark [1]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)