25 Years ISCA 1998:
Retrospectives and Reprints
25 Years of the International Symposia on Computer Architecture (Selected Papers). ACM,
1998
Retrospectives
- G. Jack Lipovski:
Retrospective: Banyan Networks for Partitioning Multiprocessor Systems.
1
Electronic Edition (ACM DL) BibTeX
- Jack B. Dennis:
Retrospective: A Preliminary Architecture for a Basic Data Flow Processor.
2-4
Electronic Edition (ACM DL) BibTeX
- Janak H. Patel:
Retrospective: Improving the Throughput of a Pipeline by Insertion of Delays.
5
Electronic Edition (ACM DL) BibTeX
- Gordon Bell, William D. Strecker:
Retrospective: What Have We Learned from the PDP-11 - What We Have Learned from VAX and Alpha.
6-10
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- Leonard J. Shustek, Bernard L. Peuto:
Retrospective: An Instruction Timing Model of CPU Performance.
11-12
Electronic Edition (ACM DL) BibTeX
- David R. Ditzel, David A. Patterson:
Retrospective: A Retrospective on High-Level Language Computer Architecture.
13-14
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- Kenneth E. Batcher:
Retrospective: Architecture of a Massively Parallel Processor.
15-16
Electronic Edition (ACM DL) BibTeX
- Kenneth A. Pier:
Retrospective: A Processor for a High-Performance Personal Computer.
17-19
Electronic Edition (ACM DL) BibTeX
- David Kroft:
Retrospective: Lockup-Free Instruction Fetch/Prefetch Cache Organization.
20-21
Electronic Edition (ACM DL) BibTeX
- James E. Smith:
Retrospective: A Study of Branch Prediction Strategies.
22-23
Electronic Edition (ACM DL) BibTeX
- David A. Patterson, Carlo H. Séquin:
Retrospective: RISC I: A Reduced Instruction Set Computer.
24-26
Electronic Edition (ACM DL) BibTeX
- James E. Smith:
Retrospective: Decoupled Access/Execute Architectures.
27-28
Electronic Edition (ACM DL) BibTeX
- Allan Gottlieb:
Retrospective: A Personal Retrospective on the NYU Ultracomputer.
29-31
Electronic Edition (ACM DL) BibTeX
- James R. Goodman:
Retrospective: Using Cache Memory to Reduce Processor-Memory Traffic.
32-33
Electronic Edition (ACM DL) BibTeX
- Joseph A. Fisher:
Retrospective: Very Long Instruction Word Architectures and the ELI-512.
34-36
Electronic Edition (ACM DL) BibTeX
- Joel S. Emer, Douglas W. Clark:
Retrospective: Characterization of Processor Performance in the VAX-11/780.
37-38
Electronic Edition (ACM DL) BibTeX
- Janak H. Patel:
Retrospective: A Low-Overhead Coherence Solution for Multiprocessors with Private Cache Memories.
39-41
Electronic Edition (ACM DL) BibTeX
- James E. Smith:
Retrospective: Implementing Precise Interrupts in Pipelined Processors.
42
Electronic Edition (ACM DL) BibTeX
- Wen-mei W. Hwu, Yale N. Patt:
Retrospective: HPSm, a High Performance Restricted Data Flow Architecture Having Minimal Functionality.
43-44
Electronic Edition (ACM DL) BibTeX
- Thomas R. Gross, Monica S. Lam:
Retrospective: A Retrospective on the Warp Machines.
45-47
Electronic Edition (ACM DL) BibTeX
- Michel Dubois, Christoph Scheurich:
Retrospective: Memory Access Buffering in Multiprocessors.
48-50
Electronic Edition (ACM DL) BibTeX
- Gurindar S. Sohi:
Retrospective: Instruction Issue Logic for High-Performance, Interruptable Pipelined Processors.
51-53
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- William J. Dally, Andrew A. Chien, Stuart Fiske, Waldemar Horwat, Richard A. Lethin, Michael D. Noakes, Peter R. Nuth, Ellen Spertus, Deborah A. Wallach, D. Scott Wills, Andrew Chang, John S. Keen:
Retrospective: the J-machine.
54-58
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- Jean-Loup Baer, Wen-Hann Wang:
Retrospective: On the Inclusion Properties for Multi-Level Cache Hierarchies.
59-60
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- John L. Hennessy:
Retrospective: Evaluation of Directory Dchemes for Cache Coherence.
61-62
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- Sarita V. Adve, Mark D. Hill:
Retrospective: Weak Ordering - A New Definition.
63-66
Electronic Edition (ACM DL) BibTeX
- Kourosh Gharachorloo:
Retrospective: Memory Consistency and Event Ordering in Scalable Shared-Memory Multiprocessors.
67-70
Electronic Edition (ACM DL) BibTeX
- Norman P. Jouppi:
Retrospective: Improving Direct-Mapped Cache Performance by the Addition of a Small Fully-Associative Cache and Prefetch Buffers.
71-73
Electronic Edition (ACM DL) BibTeX
- David E. Culler, Gregory M. Papadopoulos:
Retrospective: Monsoon: An Explicit Token-Store Architecture.
74-76
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- Wen-mei W. Hwu:
Retrospective: IMPACT: An Architectural Framework for Multiple-Instruction Issue.
77-79
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- Daniel Lenoski, James Laudon:
Retrospective: The DASH Prototype: Implementation and Performance.
80-82
Electronic Edition (ACM DL) BibTeX
- Thorsten von Eicken, David E. Culler, Klaus E. Schauser, Seth Copen Goldstein:
Retrospective: Active Messages: A Mechanism for Integrating Computation and Communication.
83-84
Electronic Edition (ACM DL) BibTeX
- Lionel M. Ni:
Retrospective: The Turn Model for Adaptive Routing.
85-86
Electronic Edition (ACM DL) BibTeX
- Tse-Yu Yeh, Yale N. Patt:
Retrospective: Alternative Implementations of Two-Level Adaptive Training Branch Prediction.
87-88
Electronic Edition (ACM DL) BibTeX
- Alexander V. Veidenbaum, Pen-Chung Yew, David J. Kuck, Constantine D. Polychronopoulos, David A. Padua, Edward S. Davidson, Kyle Gallivan:
Retrospective: The Cedar System.
89-91
Electronic Edition (ACM DL) BibTeX
- Matthias A. Blumrich, Kai Li, Richard Alpert, Cezary Dubnicki, Edward W. Felten, Jonathan Sandberg:
Retrospective: Virtual Memory Mapped Network Interface for the SHRIMP Multicomputer.
92-94
Electronic Edition (ACM DL) BibTeX
- Jeffrey Kuskin:
Retrospective: The Stanford FLASH Multiprocessor.
95-97
Electronic Edition (ACM DL) BibTeX
- Steven K. Reinhardt, James R. Larus, David A. Wood:
Retrospective: Tempest and Typhoon: User-Level Shared Memory.
98-102
Electronic Edition (ACM DL) BibTeX
- Anant Agarwal:
Retrospective: The MIT Alewife Machine: Architecture and Performance.
103-110
Electronic Edition (ACM DL) BibTeX
- Gurindar S. Sohi:
Retrospective: Multiscalar Processors.
111-114
Electronic Edition (ACM DL) BibTeX
- Dean M. Tullsen, Susan J. Eggers, Henry M. Levy:
Retrospective: Simultaneous Multithreading: Maximizing On-Chip Parallelism.
115-116
Electronic Edition (ACM DL) BibTeX
Reprints
- L. Rodney Goke, G. Jack Lipovski:
Banyan Networks for Partitioning Multiprocessor Systems.
117-124
Electronic Edition (ACM DL) BibTeX
- Jack B. Dennis, David Misunas:
A Primlinary Architecture for a Basic Data-Flow Processor.
125-131
Electronic Edition (ACM DL) BibTeX
- Janak H. Patel, Edward S. Davidson:
Improving the Throughput of a Pipeline by Insertion of Delays.
132-137
Electronic Edition (ACM DL) BibTeX
- Gordon Bell, William D. Strecker:
Computer Structures: What Have We Learned from the PDP-11?
138-151
Electronic Edition (ACM DL) BibTeX
- Bernard L. Peuto, Leonard J. Shustek:
An Instruction Timing Model of CPU Performance.
152-165
Electronic Edition (ACM DL) BibTeX
- David R. Ditzel, David A. Patterson:
Retrospective on High-Level Language Computer Architecture.
166-173
Electronic Edition (ACM DL) BibTeX
- Kenneth E. Batcher:
Architecture of a Massively Parallel Processor.
174-179
Electronic Edition (ACM DL) BibTeX
- Butler W. Lampson, Kenneth A. Pier:
A Processor for a High-Performance Personal Computer.
180-194
Electronic Edition (ACM DL) BibTeX
- David Kroft:
Lockup-Free Instruction Fetch/Prefetch Cache Organization.
195-201
Electronic Edition (ACM DL) BibTeX
- James E. Smith:
A Study of Branch Prediction Strategies.
202-215
Electronic Edition (ACM DL) BibTeX
- David A. Patterson, Carlo H. Séquin:
RISC I: A Reduced Instruction Set VLSI Computer.
216-230
Electronic Edition (ACM DL) BibTeX
- James E. Smith:
Decoupled Access/Execute Computer Architectures.
231-238
Electronic Edition (ACM DL) BibTeX
- Allan Gottlieb, Ralph Grishman, Clyde P. Kruskal, Kevin P. McAuliffe, Larry Rudolph, Marc Snir:
The NYU Ultracomputer - Designing a MIMD, Shared-Memory Parallel Machine.
239-254
Electronic Edition (ACM DL) BibTeX
- James R. Goodman:
Using Cache Memory to Reduce Processor-Memory Traffic.
255-262
Electronic Edition (ACM DL) BibTeX
- Joseph A. Fisher:
Very Long Instruction Word Architectures and the ELI-512.
263-273
Electronic Edition (ACM DL) BibTeX
- Joel S. Emer, Douglas W. Clark:
A Characterization of Processor Performance in the VAX-11/780.
274-283
Electronic Edition (ACM DL) BibTeX
- Mark S. Papamarcos, Janak H. Patel:
A Low-Overhead Coherence Solution for Multiprocessors with Private Cache Memories.
284-290
Electronic Edition (ACM DL) BibTeX
- James E. Smith, Andrew R. Pleszkun:
Implementation of Precise Interupts in Pipelined Processors.
291-299
Electronic Edition (ACM DL) BibTeX
- Wen-mei W. Hwu, Yale N. Patt:
HPSm, a High Performance Restricted Data Flow Architecture Having Minimal Functionality.
300-308
Electronic Edition (ACM DL) BibTeX
- Marco Annaratone, Emmanuel A. Arnould, Thomas R. Gross, H. T. Kung, Monica S. Lam, Onat Menzilcioglu, Ken Sarocky, Jon A. Webb:
Warp Architecture and Implementation.
309-319
Electronic Edition (ACM DL) BibTeX
- Michel Dubois, Christoph Scheurich, Faye A. Briggs:
Memory Access Buffering in Multiprocessors.
320-328
Electronic Edition (ACM DL) BibTeX
- Gurindar S. Sohi, Sriram Vajapeyam:
Instruction Issue Logic for High-Performance, Interruptable Pipelined Processors.
329-336
Electronic Edition (ACM DL) BibTeX
- William J. Dally, Linda Chao, Andrew A. Chien, Soha Hassoun, Waldemar Horwat, Jon Kaplan, Paul Song, Brian Totty, D. Scott Wills:
Architecture of a Message-Driven Processor.
337-344
Electronic Edition (ACM DL) BibTeX
- Jean-Loup Baer, Wen-Hann Wang:
On the Inclusion Properties for Multi-Level Cache Hierarchies.
345-352
Electronic Edition (ACM DL) BibTeX
- Anant Agarwal, Richard Simoni, John L. Hennessy, Mark Horowitz:
An Evaluation of Directory Schemes for Cache Coherence.
353-362
Electronic Edition (ACM DL) BibTeX
- Sarita V. Adve, Mark D. Hill:
Weak Ordering - A New Definition.
363-375
Electronic Edition (ACM DL) BibTeX
- Kourosh Gharachorloo, Daniel Lenoski, James Laudon, Phillip B. Gibbons, Anoop Gupta, John L. Hennessy:
Memory Consistency and Event Ordering in Scalable Shared-Memory Multiprocessors.
376-387
Electronic Edition (ACM DL) BibTeX
- Norman P. Jouppi:
Improving Direct-Mapped Cache Performance by the Addition of a Small Fully-Associative Cache Prefetch Buffers.
388-397
Electronic Edition (ACM DL) BibTeX
- Gregory M. Papadopoulos, David E. Culler:
Monsoon: An Explicit Token-Store Architecture.
398-407
Electronic Edition (ACM DL) BibTeX
- Pohua P. Chang, Scott A. Mahlke, William Y. Chen, Nancy J. Warter, Wen-mei W. Hwu:
IMPACT: An Architectural Framework for Multiple-Instruction-Issue Processors.
408-417
Electronic Edition (ACM DL) BibTeX
- Daniel Lenoski, James Laudon, Truman Joe, David Nakahira, Luis Stevens, Anoop Gupta, John L. Hennessy:
The DASH Prototype: Implementation and Performance.
418-429
Electronic Edition (ACM DL) BibTeX
- Thorsten von Eicken, David E. Culler, Seth Copen Goldstein, Klaus E. Schauser:
Active Messages: A Mechanism for Integrated Communication and Computation.
430-440
Electronic Edition (ACM DL) BibTeX
- Christopher J. Glass, Lionel M. Ni:
The Turn Model for Adaptive Routing.
441-450
Electronic Edition (ACM DL) BibTeX
- Tse-Yu Yeh, Yale N. Patt:
Alternative Implementations of Two-Level Adaptive Branch Prediction.
451-461
Electronic Edition (ACM DL) BibTeX
- David J. Kuck, Edward S. Davidson, Duncan H. Lawrie, Ahmed H. Sameh, Chuan-Qi Zhu:
The Cedar System and an Initial Performance Study.
462-472
Electronic Edition (ACM DL) BibTeX
- Matthias A. Blumrich, Kai Li, Richard Alpert, Cezary Dubnicki, Edward W. Felten, Jonathan Sandberg:
Virtual Memory Mapped Network Interface for the SHRIMP Multicomputer.
473-484
Electronic Edition (ACM DL) BibTeX
- Jeffrey Kuskin, David Ofelt, Mark Heinrich, John Heinlein, Richard Simoni, Kourosh Gharachorloo, John Chapin, David Nakahira, Joel Baxter, Mark Horowitz, Anoop Gupta, Mendel Rosenblum, John L. Hennessy:
The Stanford FLASH Multiprocessor.
485-496
Electronic Edition (ACM DL) BibTeX
- Steven K. Reinhardt, James R. Larus, David A. Wood:
Tempest and Typhoon: User-Level Shared Memory.
497-508
Electronic Edition (ACM DL) BibTeX
- Anant Agarwal, Ricardo Bianchini, David Chaiken, Kirk L. Johnson, David A. Kranz:
The MIT Alewife Machine: Architecture and Performance.
509-520
Electronic Edition (ACM DL) BibTeX
- Gurindar S. Sohi, Scott E. Breach, T. N. Vijaykumar:
Multiscalar Processors.
521-532
Electronic Edition (ACM DL) BibTeX
- Dean M. Tullsen, Susan J. Eggers, Henry M. Levy:
Simultaneous Multithreading: Maximizing On-Chip Parallelism.
533-544
Electronic Edition (ACM DL) BibTeX
Copyright © Sat May 16 23:24:58 2009
by Michael Ley (ley@uni-trier.de)