36. MICRO 2003:
San Diego,
CA,
USA
Proceedings of the 36th Annual International Symposium on Microarchitecture, San Diego, CA, USA, December 3-5, 2003.
ACM/IEEE 2003, ISBN 0-7695-2043-X BibTeX
- Kerry Bernstein:
Microarchitecture on the MOSFET Diet.
3-6
Electronic Edition (ACM DL) BibTeX
- Dan Ernst, Nam Sung Kim, Shidhartha Das, Sanjay Pant, Rajeev R. Rao, Toan Pham, Conrad H. Ziesler, David Blaauw, Todd M. Austin, Krisztián Flautner, Trevor N. Mudge:
Razor: A Low-Power Pipeline Based on Circuit-Level Timing Speculation.
7-18
Electronic Edition (ACM DL) BibTeX
- Hai Li, Chen-Yong Cher, T. N. Vijaykumar, Kaushik Roy:
VSV: L2-Miss-Driven Variable Supply-Voltage Scaling for Low Power.
19-28
Electronic Edition (ACM DL) BibTeX
- Shubhendu S. Mukherjee, Christopher T. Weaver, Joel S. Emer, Steven K. Reinhardt, Todd M. Austin:
A Systematic Methodology to Compute the Architectural Vulnerability Factors for a High-Performance Microprocessor.
29-42
Electronic Edition (ACM DL) BibTeX
- Bradford M. Beckmann, David A. Wood:
TLC: Transmission Line Caches.
43-54
Electronic Edition (ACM DL) BibTeX
- Zeshan Chishti, Michael D. Powell, T. N. Vijaykumar:
Distance Associativity for High-Performance Energy-Efficient Non-Uniform Cache Architectures.
55-66
Electronic Edition (ACM DL) BibTeX
- Se-Hyun Yang, Babak Falsafi:
Near-Optimal Precharging in High-Performance Nanoscale CMOS Caches.
67-80
Electronic Edition (ACM DL) BibTeX
- Rakesh Kumar, Keith I. Farkas, Norman P. Jouppi, Parthasarathy Ranganathan, Dean M. Tullsen:
Single-ISA Heterogeneous Multi-Core Architectures: The Potential for Processor Power Reduction.
81-92
Electronic Edition (ACM DL) BibTeX
- Canturk Isci, Margaret Martonosi:
Runtime Power Monitoring in High-End Processors: Methodology and Empirical Data.
93-104
Electronic Edition (ACM DL) BibTeX
- Hangsheng Wang, Li-Shiuan Peh, Sharad Malik:
Power-driven Design of Router Microarchitectures in On-chip Networks.
105-116
Electronic Edition (ACM DL) BibTeX
- Allan Hartstein, Thomas R. Puzak:
Optimum Power/Performance Pipeline Depth.
117-128
Electronic Edition (ACM DL) BibTeX
- Nathan Clark, Hongtao Zhong, Scott A. Mahlke:
Processor Acceleration Through Automated Instruction Set Customization.
129-140
Electronic Edition (ACM DL) BibTeX
- Silviu Ciricescu, Ray Essick, Brian Lucas, Phil May, Kent Moat, Jim Norris, Michael A. Schuette, Ali Saidi:
The Reconfigurable Streaming Vector Processor (RSVPTM).
141-150
Electronic Edition (ACM DL) BibTeX
- Richard A. Hankins, Trung A. Diep, Murali Annavaram, Brian Hirano, Harald Eri, Hubert Nueckel, John Paul Shen:
Scaling and Charact rizing Database Workloads: Bridging the Gap between Research and Practice.
151-164
Electronic Edition (ACM DL) BibTeX
- Michael S. Schlansker:
In Memory of Bob Rau.
165-168
Electronic Edition (ACM DL) BibTeX
- Kim M. Hazelwood, Michael D. Smith:
Generational Cache Management of Code Traces in Dynamic Optimization Systems.
169-179
Electronic Edition (ACM DL) BibTeX
- Jiwei Lu, Howard Chen, Rao Fu, Wei-Chung Hsu, Bobbie Othmer, Pen-Chung Yew, Dong-yuan Chen:
The Performance of Runtime Data Cache Prefetching in a Dynamic Optimization System.
180-190
Electronic Edition (ACM DL) BibTeX
- Leonid Baraz, Tevi Devor, Orna Etzion, Shalom Goldenberg, Alex Skaletsky, Yun Wang, Yigel Zemach:
IA-32 Execution Layer: a two-phase dynamic translator designed to support IA-32 applications on Itanium-based systems.
191-204
Electronic Edition (ACM DL) BibTeX
- Vikram S. Adve, Chris Lattner, Michael Brukman, Anand Shukla, Brian Gaeke:
LLVA: A Low-level Virtual Instruction Set Architecture.
205-216
Electronic Edition (ACM DL) BibTeX
- Ashutosh S. Dhodapkar, James E. Smith:
Comparing Program Phase Detection Techniques.
217-227
Electronic Edition (ACM DL) BibTeX
- Brian A. Fields, Rastislav Bodík, Mark D. Hill, Chris J. Newburn:
Using Interaction Costs for Microarchitectural Bottleneck Analysis.
228-242
Electronic Edition (ACM DL) BibTeX
- Daniel A. Jiménez:
Fast Path-Based Neural Branch Prediction.
243-252
Electronic Edition (ACM DL) BibTeX
- Ho-Seop Kim, James E. Smith:
Hardware Support for Control Transfers in Code Caches.
253-264
Electronic Edition (ACM DL) BibTeX
- Saisanthosh Balakrishnan, Gurindar S. Sohi:
Exploiting Value Locality in Physical Register Files.
265-276
Electronic Edition (ACM DL) BibTeX
- Ilhyun Kim, Mikko H. Lipasti:
Macro-op Scheduling: Relaxing Scheduling Loop Constraints.
277-290
Electronic Edition (ACM DL) BibTeX
- Steven Swanson, Ken Michelson, Andrew Schwerin, Mark Oskin:
WaveScalar.
291-302
Electronic Edition (ACM DL) BibTeX
- Karthikeyan Sankaralingam, Stephen W. Keckler, William R. Mark, Doug Burger:
Universal Mechanisms for Data-Parallel Architectures.
303-314
Electronic Edition (ACM DL) BibTeX
- Enric Gibert, F. Jesús Sánchez, Antonio González:
Flexible Compiler-Managed L0 Buffers for Clustered VLIW Processors.
315-325
Electronic Edition (ACM DL) BibTeX
- Alex Aletà, Josep M. Codina, Antonio González, David R. Kaeli:
Instruction Replication for Clustered Microarchitectures.
326-338
Electronic Edition (ACM DL) BibTeX
- G. Edward Suh, Dwaine E. Clarke, Blaise Gassend, Marten van Dijk, Srinivas Devadas:
Efficient Memory Integrity Verification and Encryption for Secure Processors.
339-350
Electronic Edition (ACM DL) BibTeX
- Jun Yang, Youtao Zhang, Lan Gao:
Fast Secure Processor for Inhibiting Software Piracy and Tampering.
351-360
Electronic Edition (ACM DL) BibTeX
- Stefanos Kaxiras, Georgios Keramidas:
IPStash: a Power-Efficient Memory Architecture for IP-lookup.
361-372
Electronic Edition (ACM DL) BibTeX
- Jorge García, Jesús Corbal, Llorenç Cerdà, Mateo Valero:
Design and Implementation of High-Performance Memory Systems for Future Packet Buffers.
373-386
Electronic Edition (ACM DL) BibTeX
- Ronald D. Barnes, Erik M. Nystrom, John W. Sias, Sanjay J. Patel, Nacho Navarro, Wen-mei W. Hwu:
Beating in-order stalls with "flea-flicker" two-pass pipelining.
387-398
Electronic Edition (ACM DL) BibTeX
- Simha Sethumadhavan, Rajagopalan Desikan, Doug Burger, Charles R. Moore, Stephen W. Keckler:
Scalable Hardware Memory Disambiguation for High ILP Processors.
399-410
Electronic Edition (ACM DL) BibTeX
- Il Park, Chong-liang Ooi, T. N. Vijaykumar:
Reducing Design Complexity of the Load/Store Queue.
411-422
Electronic Edition (ACM DL) BibTeX
- Haitham Akkary, Ravi Rajwar, Srikanth T. Srinivasan:
Checkpoint Processing and Recovery: Towards Scalable Large Instruction Window Processors.
423-
Electronic Edition (ACM DL) BibTeX
Copyright © Sat May 16 23:29:54 2009
by Michael Ley (ley@uni-trier.de)
