2008 |
14 | EE | Enric Herrero,
José González,
Ramon Canal:
Distributed cooperative caching.
PACT 2008: 134-143 |
13 | EE | Xiaoyao Liang,
Ramon Canal,
Gu-Yeon Wei,
David Brooks:
Replacing 6T SRAMs with 3T1D DRAMs in the L1 Data Cache to Combat Process Variability.
IEEE Micro 28(1): 60-68 (2008) |
12 | EE | Matteo Monchiero,
Ramon Canal,
Antonio González:
Power/Performance/Thermal Design-Space Exploration for Multicore Architectures.
IEEE Trans. Parallel Distrib. Syst. 19(5): 666-681 (2008) |
2007 |
11 | EE | Xiaoyao Liang,
Ramon Canal,
Gu-Yeon Wei,
David Brooks:
Process Variation Tolerant 3T1D-Based Cache Architectures.
MICRO 2007: 15-26 |
2006 |
10 | EE | Matteo Monchiero,
Ramon Canal,
Antonio González:
Design space exploration for multicore architectures: a power/performance/thermal view.
ICS 2006: 177-186 |
2005 |
9 | EE | Ramon Canal,
Antonio González,
James E. Smith:
Value Compression for Efficient Computation.
Euro-Par 2005: 519-529 |
2004 |
8 | EE | Ramon Canal,
Antonio González,
James E. Smith:
Software-Controlled Operand-Gating.
CGO 2004: 125-136 |
2003 |
7 | EE | Jaume Abella,
Ramon Canal,
Antonio González:
Power- and Complexity-Aware Issue Queue Designs.
IEEE Micro 23(5): 50-58 (2003) |
2001 |
6 | EE | Ramon Canal,
Antonio González:
Reducing the complexity of the issue logic.
ICS 2001: 312-320 |
5 | | Ramon Canal,
Joan-Manuel Parcerisa,
Antonio González:
Dynamic Code Partitioning for Clustered Architectures.
International Journal of Parallel Programming 29(1): 59-79 (2001) |
2000 |
4 | EE | Ramon Canal,
Joan-Manuel Parcerisa,
Antonio González:
Dynamic Cluster Assignment Mechanisms.
HPCA 2000: 133- |
3 | EE | Ramon Canal,
Antonio González:
A low-complexity issue logic.
ICS 2000: 327-335 |
2 | EE | Ramon Canal,
Antonio González,
James E. Smith:
Very low power pipelines using significance compression.
MICRO 2000: 181-190 |
1999 |
1 | EE | Ramon Canal,
Joan-Manuel Parcerisa,
Antonio González:
A Cost-Effective Clustered Architecture.
IEEE PACT 1999: 160-168 |