2008 |
14 | EE | Antonio Flores,
Manuel E. Acacio,
Juan L. Aragón:
Address Compression and Heterogeneous Interconnects for Energy-Efficient High-Performance in Tiled CMPs.
ICPP 2008: 295-303 |
13 | EE | Juan L. Aragón,
Alexander V. Veidenbaum:
Optimizing CAM-based instruction cache designs for low-power embedded systems.
Journal of Systems Architecture - Embedded Systems Design 54(12): 1155-1163 (2008) |
12 | EE | Antonio Flores,
Juan L. Aragón,
Manuel E. Acacio:
An energy consumption characterization of on-chip interconnection networks for tiled CMP architectures.
The Journal of Supercomputing 45(3): 341-364 (2008) |
2007 |
11 | EE | Antonio Flores,
Juan L. Aragón,
Manuel E. Acacio:
Sim-PowerCMP: A Detailed Simulator for Energy Consumption Analysis in Future Embedded CMP Architectures.
AINA Workshops (1) 2007: 752-757 |
10 | EE | Juan M. Cebrian,
Juan L. Aragón,
José M. García,
Stefanos Kaxiras:
Adaptive VP decay: making value predictors leakage-efficient designs for high performance processors.
Conf. Computing Frontiers 2007: 113-122 |
9 | EE | Antonio Flores,
Juan L. Aragón,
Manuel E. Acacio:
Efficient Message Management in Tiled CMP Architectures Using a Heterogeneous Interconnection Network.
HiPC 2007: 133-146 |
8 | EE | Juan M. Cebrian,
Juan L. Aragón,
José M. García:
Leakage Energy Reduction in Value Predictors through Static Decay.
IPDPS 2007: 1-7 |
2006 |
7 | EE | Juan L. Aragón,
José M. González,
Antonio González:
Control Speculation for Energy-Efficient Next-Generation Superscalar Processors.
IEEE Trans. Computers 55(3): 281-291 (2006) |
2005 |
6 | EE | Juan L. Aragón,
Alexander V. Veidenbaum:
Energy-Effective Instruction Fetch Unit for Wide Issue Processors.
Asia-Pacific Computer Systems Architecture Conference 2005: 15-27 |
2004 |
5 | EE | Juan L. Aragón,
Dan Nicolaescu,
Alexander V. Veidenbaum,
Ana-Maria Badulescu:
Energy-Efficient Design for Highly Associative Instruction Caches in Next-Generation Embedded Processors.
DATE 2004: 1374-1375 |
2003 |
4 | EE | Juan L. Aragón,
José González,
Antonio González:
Power-Aware Control Speculation through Selective Throttling.
HPCA 2003: 103-112 |
2002 |
3 | EE | Juan L. Aragón,
José González,
Antonio González,
James E. Smith:
Dual path instruction processing.
ICS 2002: 220-229 |
2001 |
2 | EE | Juan L. Aragón,
José González,
José M. García,
Antonio González:
Confidence Estimation for Branch Prediction Reversal.
HiPC 2001: 214-223 |
1 | | Juan L. Aragón,
José González,
José M. García,
Antonio González:
Selective Branch Prediction Reversal By Correlating with Data Values and Control Flow.
ICCD 2001: 228-233 |