| 2002 |
|---|
| 15 | EE | Siddhartha V. Tambat,
Sriram Vajapeyam:
Page-Level Behavior of Cache Contention.
Computer Architecture Letters 1: (2002) |
| 2001 |
|---|
| 14 | | Burkhard Monien,
Viktor K. Prasanna,
Sriram Vajapeyam:
High Performance Computing - HiPC 2001, 8th International Conference, Hyderabad, India, December, 17-20, 2001, Proceedings
Springer 2001 |
| 13 | EE | Sriram Vajapeyam,
Mateo Valero:
Early 21st Century Processors - Guest Editors' Introduction.
IEEE Computer 34(4): 47-50 (2001) |
| 2000 |
|---|
| 12 | | Mateo Valero,
Viktor K. Prasanna,
Sriram Vajapeyam:
High Performance Computing - HiPC 2000, 7th International Conference, Bangalore, India, December 17-20, 2000, Proceedings
Springer 2000 |
| 11 | EE | Siddhartha V. Tambat,
Sriram Vajapeyam:
Non-Strict Cache Coherence: Exploiting Data-Race Tolerance in Emerging Applications.
ICPP 2000: 87-94 |
| 1999 |
|---|
| 10 | | Sriram Vajapeyam:
Whither Indian Computer Science R & D?
HiPC 1999: 175 |
| 9 | EE | Sriram Vajapeyam,
P. J. Joseph,
Tulika Mitra:
Dynamic Vectorization: A Mechanism for Exploiting Far-Flung ILP in Ordinary Programs.
ISCA 1999: 16-27 |
| 1998 |
|---|
| 8 | EE | Gurindar S. Sohi,
Sriram Vajapeyam:
Instruction Issue Logic for High-Performance, Interruptable Pipelined Processors.
25 Years ISCA: Retrospectives and Reprints 1998: 329-336 |
| 1997 |
|---|
| 7 | EE | Sriram Vajapeyam,
Tulika Mitra:
Improving Superscalar Instruction Dispatch and Issue by Exploiting Dynamic Code Sequences.
ISCA 1997: 1-12 |
| 6 | | James E. Smith,
Sriram Vajapeyam:
Trace Processors: Moving to Fourth-Generation Microarchitectures.
IEEE Computer 30(9): 68-74 (1997) |
| 1993 |
|---|
| 5 | | Sriram Vajapeyam,
Wei-Chung Hsu:
Toward Effective Scalar Hardware for Highly Vectorizable Applications.
J. Parallel Distrib. Comput. 19(3): 147-162 (1993) |
| 1992 |
|---|
| 4 | EE | Sriram Vajapeyam,
Wei-Chung Hsu:
On the instruction-level characteristics of scalar code in highly-vectorized scientific applications.
MICRO 1992: 20-28 |
| 1991 |
|---|
| 3 | EE | Sriram Vajapeyam,
Gurindar S. Sohi,
Wei-Chung Hsu:
An Empirical Study of the CRAY Y-MP Processor Using the Perfect Club Benchmarks.
ISCA 1991: 170-179 |
| 1989 |
|---|
| 2 | | Gurindar S. Sohi,
Sriram Vajapeyam:
Tradeoffs in Instruction Format Design for Horizontal Architectures.
ASPLOS 1989: 15-25 |
| 1987 |
|---|
| 1 | | Gurindar S. Sohi,
Sriram Vajapeyam:
Instruction Issue Logic for High-Performance, Interruptable Pipelined Processors.
ISCA 1987: 27-34 |
