ASPLOS-XII, 2006: San Jose, CA, USA

• Mendel Rosenblum:
  Impact of virtualization on computer architecture and operating systems. 1
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Virtualization

• Keith Adams, Ole Agesen:
  A comparison of software and hardware techniques for x86 virtualization. 2-13
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• Stephen T. Jones, Andrea C. Arpaci-Dusseau, Remzi H. Arpaci-Dusseau:
  Geiger: monitoring the buffer cache in a virtual machine environment. 14-24
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• Jedidiah R. Crandall, Gary Wassermann, Daniela A. S. de Oliveira, Zhendong Su, Shyhtsun Felix Wu, Frederic T. Chong:
  Temporal search: detecting hidden malware timebombs with virtual machines. 25-36
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Races and memory debugging I

• Shan Lu, Joseph Tucek, Feng Qin, Yuanyuan Zhou:
  AVIO: detecting atomicity violations via access interleaving invariants. 37-48
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• Min Xu, Mark D. Hill, Rastislav Bodík:
  A regulated transitive reduction (RTR) for longer memory race recording. 49-60
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• Michael D. Bond, Kathryn S. McKinley:
  Bell: bit-encoding online memory leak detection. 61-72
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Hardware reliability and fault tolerance

• Smitha Shyam, Kypros Constantinides, Sujay Phadke, Valeria Bertacco, Todd M. Austin:
  Ultra low-cost defect protection for microprocessor pipelines. 73-82
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• Vimal K. Reddy, Eric Rotenberg, Sailashri Parthasarathy:
  Understanding prediction-based partial redundant threading for low-overhead, high- coverage fault tolerance. 83-94
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• Angshuman Parashar, Anand Sivasubramaniam, Sudhanva Gurumurthi:
  SlicK: slice-based locality exploitation for efficient redundant multithreading. 95-105
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Energy efficiency

• Taliver Heath, Ana Paula Centeno, Pradeep George, Luiz Ramos, Yogesh Jaluria:
  Mercury and freon: temperature emulation and management for server systems. 106-116
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• Taeho Kgil, Shaun D'Souza, Ali G. Saidi, Nathan L. Binkert, Ronald G. Dreslinski, Trevor N. Mudge, Steven K. Reinhardt, Krisztián Flautner:
  PicoServer: using 3D stacking technology to enable a compact energy efficient chip multiprocessor. 117-128
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Scheduling and spatial programming

• Katherine E. Coons, Xia Chen, Doug Burger, Kathryn S. McKinley, Sundeep K. Kushwaha:
  A spatial path scheduling algorithm for EDGE architectures. 129-140
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• Martha Mercaldi, Steven Swanson, Andrew Petersen, Andrew Putnam, Andrew Schwerin, Mark Oskin, Susan J. Eggers:
  Instruction scheduling for a tiled dataflow architecture. 141-150
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• Michael I. Gordon, William Thies, Saman P. Amarasinghe:
  Exploiting coarse-grained task, data, and pipeline parallelism in stream programs. 151-162
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• Mahim Mishra, Timothy J. Callahan, Tiberiu Chelcea, Girish Venkataramani, Seth Copen Goldstein, Mihai Budiu:
  Tartan: evaluating spatial computation for whole program execution. 163-174
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Estimation and prediction of power and performance

• Stijn Eyerman, Lieven Eeckhout, Tejas Karkhanis, James E. Smith:
  A performance counter architecture for computing accurate CPI components. 175-184
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• Benjamin C. Lee, David M. Brooks:
  Accurate and efficient regression modeling for microarchitectural performance and power prediction. 185-194
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• Engin Ipek, Sally A. McKee, Rich Caruana, Bronis R. de Supinski, Martin Schulz:
  Efficiently exploring architectural design spaces via predictive modeling. 195-206
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Races and memory debugging II

• Mazen Kharbutli, Xiaowei Jiang, Yan Solihin, Guru Venkataramani, Milos Prvulovic:
  Comprehensively and efficiently protecting the heap. 207-218
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• Trishul M. Chilimbi, Vinod Ganapathy:
  HeapMD: identifying heap-based bugs using anomaly detection. 219-228
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• Satish Narayanasamy, Cristiano Pereira, Brad Calder:
  Recording shared memory dependencies using strata. 229-240
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Emerging technologies

• Jaidev P. Patwardhan, Vijeta Johri, Chris Dwyer, Alvin R. Lebeck:
  A defect tolerant self-organizing nanoscale SIMD architecture. 241-251
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• Ethan Schuchman, T. N. Vijaykumar:
  A program transformation and architecture support for quantum uncomputation. 252-263
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• Shashidhar Mysore, Banit Agrawal, Navin Srivastava, Sheng-Chih Lin, Kaustav Banerjee, Timothy Sherwood:
  Introspective 3D chips. 264-273
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Memory and locality issues

• Jason F. Cantin, Mikko H. Lipasti, James E. Smith:
  Stealth prefetching. 274-282
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• Koushik Chakraborty, Philip M. Wells, Gurindar S. Sohi:
  Computation spreading: employing hardware migration to specialize CMP cores on-the-fly. 283-292
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• Jason E. Miller, Anant Agarwal:
  Software-based instruction caching for embedded processors. 293-302
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Embedded and special-purpose systems

• Xin Li, Marian Boldt, Reinhard von Hanxleden:
  Mapping esterel onto a multi-threaded embedded processor. 303-314
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• Nathan L. Binkert, Ali G. Saidi, Steven K. Reinhardt:
  Integrated network interfaces for high-bandwidth TCP/IP. 315-324
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• David Tarditi, Sidd Puri, Jose Oglesby:
  Accelerator: using data parallelism to program GPUs for general-purpose uses. 325-335
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Transactional memory

• Peter Damron, Alexandra Fedorova, Yossi Lev, Victor Luchangco, Mark Moir, Daniel Nussbaum:
  Hybrid transactional memory. 336-346
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• Weihaw Chuang, Satish Narayanasamy, Ganesh Venkatesh, Jack Sampson, Michael Van Biesbrouck, Gilles Pokam, Brad Calder, Osvaldo Colavin:
  Unbounded page-based transactional memory. 347-358
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• Michelle J. Moravan, Jayaram Bobba, Kevin E. Moore, Luke Yen, Mark D. Hill, Ben Liblit, Michael M. Swift, David A. Wood:
  Supporting nested transactional memory in logTM. 359-370
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• JaeWoong Chung, Chi Cao Minh, Austen McDonald, Travis Skare, Hassan Chafi, Brian D. Carlstrom, Christos Kozyrakis, Kunle Olukotun:
  Tradeoffs in transactional memory virtualization. 371-381
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Compilation

• Motohiro Kawahito, Hideaki Komatsu, Takao Moriyama, Hiroshi Inoue, Toshio Nakatani:
  A new idiom recognition framework for exploiting hardware-assist instructions. 382-393
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• Sorav Bansal, Alex Aiken:
  Automatic generation of peephole superoptimizers. 394-403
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• Armando Solar-Lezama, Liviu Tancau, Rastislav Bodík, Sanjit A. Seshia, Vijay A. Saraswat:
  Combinatorial sketching for finite programs. 404-415
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• Jeff Da Silva, J. Gregory Steffan:
  A probabilistic pointer analysis for speculative optimizations. 416-425
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