Volume 29,
Number 1,
January 1980
Correspondence
Volume 29,
Number 2,
February 1980
- Gene L. Haviland, Al A. Tuszynski:
A CORDIC Arithmethic Processor Chip.
68-79 BibTeX
- Michel C. Rahier, Paul G. A. Jespers:
Dedicated LSI for a Microprocessor-Controlled Hand-Carried OCR System.
79-88 BibTeX
- Yuzo Kita, Noboru Yamaguchi, Mamoru Sugie, Shigeru Yoshizawa:
The Development of a Bubble Memory Controller for Low-Cost File Use.
89-96 BibTeX
- Matt Townsend, Marcian E. Hoff Jr., Robert E. Holm:
An NMOS Microprocessor for Analog Signal Processing.
97-102 BibTeX
- Tsuneo Funabashi, Katsuaki Takagi, Toshiro Tsukada, Hideo Nakamura, Michio Hara:
An NMOS Microcomputer Peripheral Interface Unit Incorporating an Analog-to-Digital Converter.
102-107 BibTeX
- David A. Patterson, Carlo H. Séquin:
Design Considerations for Single-Chip Computers of the Future.
108-116 BibTeX
- Alan J. Weissberger:
An LSI Implementation of an Intelligent CRC Computer and Programmable Character Comparator.
116-124 BibTeX
- Rodger A. Cliff:
Acceptable Testing of VLSI Components Which Contain Error Correctors.
126-134 BibTeX
- Jan Zeman, H. Troy Nagle Jr.:
A High-Speed Microprogrammable Digital Signal Processor Employing Distributed Arithmetic.
134-144 BibTeX
- Ayakannu Mathialagan, Nripendra N. Biswas:
Optimal Interconnections in the Design of Microprocessors and Digital Systems.
145-149 BibTeX
- Jega A. Arulpragasam, Robert A. Giggi, Richard F. Lary, Daniel T. Sullivan, Chin-Chang Wu:
Modular Minicomputers Using Microprocessors.
149-160 BibTeX
- John J. Lenahan, Fergus K. Fung:
Performance of Cooperative Loosely Coupled Microprocessor Architectures in an Interactive Data Base Task.
161-180 BibTeX
- Daniel Tabak, G. Jack Lipovski:
MOVE Architecture in Digital Controllers.
180-190 BibTeX
Correspondence
Volume 29,
Number 3,
March 1980
Correspondence
Volume 29,
Number 4,
April 1980
Correspondence
Volume 29,
Number 5,
May 1980
Correspondece
Volume 29,
Number 6,
June 1980
Correspondence
- James E. Smith:
Measures of the Effectiveness of Fault Signature Analysis.
510-514 BibTeX
- René David, Pascale Thévenod-Fosse:
Minimal Detecting Transition Sequences: Application to Random Testing.
514-518 BibTeX
- Vinod K. Agarwal:
Multiple Fault Detection in Programmable Logic Arrays.
518-522 BibTeX
- Mark G. Karpovsky, Stephen Y. H. Su:
Detection and Location of Input and Feedback Bridging Faults Among Input and Output Lines.
523-527 BibTeX
,
Correction:
IEEE Transactions on Computer 30(1):
86 (1981)
- J. Galiay, Yves Crouzet, M. Vergniault:
Physical Versus Logical Fault Models MOS LSI Circuits: Impact on Their Testability.
527-531 BibTeX
- Yves Crouzet, Christian Landrault:
Design of Self-Checking MOS-LSI Circuits: Application to a Four-Bit Microprocessor.
532-537 BibTeX
- Daniel Etiemble:
Multivalued I2L Circuits for TSC Checkers.
537-540 BibTeX
- Luca Simoncini, F. Saheban, Arthur D. Friedman:
Design of Self-Diagnosable Multiprocessor Systems with Concurrent Computation and Diagnosis.
540-546 BibTeX
- P. A. Lee, N. Ghani, K. Heron:
A Recovery Cache for the PDP-11.
546-549 BibTeX
Volume 29,
Number 7,
July 1980
- Kin-Man Chung, Fabrizio Luccio, C. K. Wong:
On the Complexity of Sorting in Magnetic Bubble Memory Systems.
553-563 BibTeX
- Frances L. Van Scoy:
The Parallel Recognition of Classes of Graphs.
563-570 BibTeX
- Jon Louis Bentley, Derick Wood:
An Optimal Worst Case Algorithm for Reporting Intersections of Rectangles.
571-577 BibTeX
- Hiroshi Hagiwara, Shinji Tomita, Shigeru Oyanagi, Kiyoshi Shibayama:
A Dynamically Microprogammable Computer with Low-Level Parallelism.
577-595 BibTeX
- Simon S. Lam:
Packet Broadcast Networks - A Performance Analysis of the R-ALOHA Protocol.
596-603 BibTeX
- Tich T. Dao, Marc Davio, Colette Gossart:
Complex Number Arithmetic with Odd-Valued Logic.
604-611 BibTeX
- Samuel T. Chanson, Prem S. Sinha:
Optimization of Memory Hierarchies in Multiprogrammed Computer Systems With Fixed Cost Constraint.
611-618 BibTeX
- Francis Y. L. Chin, K. Samson Fok:
Fast Sorting Algorithms on Uniform Ladders (Multiple Shift-Register Loops).
618-631 BibTeX
- Omar Wing, John W. Huang:
A Computation Model of Parallel Solution of Linear Equations.
632-638 BibTeX
- Bulent I. Dervisoglu, Howard A. Sholl:
Theory and Design of Mixed-Mode Sequential Machines.
639-648 BibTeX
- John C. Sutton, Jon G. Bredeson:
Minimal Redundant Logic for High Reliability and Irredundant Testability.
648-656 BibTeX
Correspondence
Volume 29,
Number 8,
August 1980
Correspondence
Volume 29,
Number 9,
September 1980
Correspondence
Volume 29,
Number 10,
October 1980
Correspondence
Volume 29,
Number 11,
November 1980
Correspondence
Volume 29,
Number 12,
December 1980
- Rami R. Razouk, Gerald Estrin:
Modeling and Verification of Communication Protocols in SARA: The X.21 Interface.
1038-1052 BibTeX
- Parviz Kermani, Leonard Kleinrock:
A Tradeoff Study of Switching Systems in Computer Communication Networks.
1052-1060 BibTeX
- Georges Gardarin, Wesley W. Chu:
A Distributed Control Algorithm for Reliably and Consistently Updating Replicated Databases.
1060-1068 BibTeX
- Peter P. Chen, Jacky Akoka:
Optimal Design of Distributed Information Systems.
1068-1080 BibTeX
- Michael J. Flynn, John L. Hennessy:
Parallelism and Representation Problems in Distributed Systems.
1060-1086 BibTeX
- Mario J. Gonzalez Jr., Bernard W. Jordan Jr.:
A Framework for the Quantitative Evaluation of Distributed Computer Systems.
1087-1094 BibTeX
- James R. McGraw:
Data Flow Computing - Software Development.
1095-1103 BibTeX
- Reid G. Smith:
The Contract Net Protocol: High-Level Communication and Control in a Distributed Problem Solver.
1104-1113 BibTeX
,
Correction:
IEEE Transactions on Computer 30(5):
372 (1981)
- Steven I. Kartashev, Svetlana P. Kartashev:
Problems of Designing Supersystems with Dynamic Architectures.
1114-1132 BibTeX
- Larry D. Wittie, André M. Van Tilborg:
MICROS, A Distributed Operating System for MICRONET, A Reconfigurable Network Computer.
1133-1144 BibTeX
- Victor R. Lesser, Lee D. Erman:
Distributed Interpretation: A Model and Experiment.
1144-1163 BibTeX
Copyright © Sun May 17 00:22:58 2009
by Michael Ley (ley@uni-trier.de)