33. ISCA 2006:
Boston,
MA,
Wisconsin,
USA
33rd International Symposium on Computer Architecture (ISCA 2006), June 17-21, 2006, Boston, MA, USA.
IEEE Computer Society 2006, ISBN 0-7695-2608-X BibTeX
Introduction
Keynote 1
Session 1:
Interconnection Networks
Session 2:
Memory Models
- Arvind, Jan-Willem Maessen:
Memory Model = Instruction Reordering + Store Atomicity.
29-40
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- Christoph von Praun, Harold W. Cain, Jong-Deok Choi, Kyung Dong Ryu:
Conditional Memory Ordering.
41-52
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- Austen McDonald, JaeWoong Chung, Brian D. Carlstrom, Chi Cao Minh, Hassan Chafi, Christos Kozyrakis, Kunle Olukotun:
Architectural Semantics for Practical Transactional Memory.
53-65
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Session 3:
Power and Thermal Management
- Parthasarathy Ranganathan, Phil Leech, David E. Irwin, Jeffrey S. Chase:
Ensemble-level Power Management for Dense Blade Servers.
66-77
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- James Donald, Margaret Martonosi:
Techniques for Multicore Thermal Management: Classification and New Exploration.
78-88
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- Yuan Lin, Hyunseok Lee, Mark Woh, Yoav Harel, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Krisztián Flautner:
SODA: A Low-power Architecture For Software Radio.
89-101
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Session 4:
Multicore
Keynote 2
Session 5A:
Memory Access Issues
Session 5B:
Cache Design I
Session 6A:
Security and Network Processors
- Chenyu Yan, Daniel Englender, Milos Prvulovic, Brian Rogers, Yan Solihin:
Improving Cost, Performance, and Security of Memory Encryption and Authentication.
179-190
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- Benjamin C. Brodie, David E. Taylor, Ron K. Cytron:
A Scalable Architecture For High-Throughput Regular-Expression Pattern Matching.
191-202
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- Jahangir Hasan, Srihari Cadambi, Venkata Jakkula, Srimat T. Chakradhar:
Chisel: A Storage-efficient, Collision-free Hash-based Network Processing Architecture.
203-215
Electronic Edition (link) BibTeX
Session 6B:
Multithreading
Session 7A:
Cache Design II
Session 7B:
Potpourri
Session 8A:
Dataflow
Session 8B:
Cache Coherence
Keynote 3
Session 9:
Quantum Computing
- Rodney Van Meter, Kae Nemoto, W. J. Munro, Kohei M. Itoh:
Distributed Arithmetic on a Quantum Multicomputer.
354-365
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- Nemanja Isailovic, Yatish Patel, Mark Whitney, John Kubiatowicz:
Interconnection Networks for Scalable Quantum Computers.
366-377
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- Darshan D. Thaker, Tzvetan S. Metodi, Andrew W. Cross, Isaac L. Chuang, Frederic T. Chong:
Quantum Memory Hierarchies: Efficient Designs to Match Available Parallelism in Quantum Computing.
378-390
Electronic Edition (link) BibTeX
Copyright © Sat May 16 23:24:58 2009
by Michael Ley (ley@uni-trier.de)
