Volume 9,
Number 1,
January 2004
- Annette Bunker, Ganesh Gopalakrishnan, Sally A. McKee:
Formal hardware specification languages for protocol compliance verification.
1-32
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- Hao Li, Srinivas Katkoori, Wai-Kei Mak:
Power minimization algorithms for LUT-based FPGA technology mapping.
33-51
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- Jeonghun Cho, Yunheung Paek, David B. Whalley:
Fast memory bank assignment for fixed-point digital signal processors.
52-74
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- Sandip Das, Susmita Sur-Kolay, Bhargab B. Bhattacharya:
Manhattan-diagonal routing in channels and switchboxes.
75-104
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- Lieh-Ming Wu, Kuochen Wang, Chuang-Yi Chiu:
A BNF-based automatic test program generator for compatible microprocessor verification.
105-132
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Volume 9,
Number 2,
April 2004
- Per Gunnar Kjeldsberg, Francky Catthoor, Einar J. Aas:
Storage requirement estimation for optimized design of data intensive applications.
133-158
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- Sagar S. Sabade, D. M. H. Walker:
IDDX-based test methods: A survey.
159-198
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- Yuchun Ma, Xianlong Hong, Sheqin Dong, Yici Cai, Chung-Kuan Cheng, Jun Gu:
Stairway compaction using corner block list and its applications with rectilinear blocks.
199-211
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- Praveen K. Murthy, Shuvra S. Bhattacharyya:
Buffer merging - a powerful technique for reducing memory requirements of synchronous dataflow specifications.
212-237
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- Alex Doboli, Nagu R. Dhanwada, Adrián Núñez-Aldana, Ranga Vemuri:
A two-layer library-based approach to synthesis of analog systems from VHDL-AMS specifications.
238-271
Electronic Edition (ACM DL) BibTeX
Volume 9,
Number 3,
July 2004
- Vijay Sundararajan, Sachin S. Sapatnekar, Keshab K. Parhi:
A new approach for integration of min-area retiming and min-delay padding for simultaneously addressing short-path and long-path constraints.
273-289
Electronic Edition (ACM DL) BibTeX
- Kevin M. Lepak, Min Xu, Jun Chen, Lei He:
Simultaneous shield insertion and net ordering for capacitive and inductive coupling minimization.
290-309
Electronic Edition (ACM DL) BibTeX
- Juan de Vicente, Juan Lanchares, Román Hermida:
Annealing placement by thermodynamic combinatorial optimization.
310-332
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- Andreas Dandalis, Viktor K. Prasanna:
An adaptive cryptographic engine for internet protocol security architectures.
333-353
Electronic Edition (ACM DL) BibTeX
- Jun Yang, Rajiv Gupta, Chuanjun Zhang:
Frequent value encoding for low power data buses.
354-384
Electronic Edition (ACM DL) BibTeX
Volume 9,
Number 4,
October 2004
- Ali Dasdan:
Experimental analysis of the fastest optimum cycle ratio and mean algorithms.
385-418
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- Arijit Ghosh, Tony Givargis:
Cache optimization for embedded processor cores: An analytical approach.
419-440
Electronic Edition (ACM DL) BibTeX
- Sumit Gupta, Rajesh K. Gupta, Nikil D. Dutt, Alexandru Nicolau:
Coordinated parallelizing compiler optimizations and high-level synthesis.
441-470
Electronic Edition (ACM DL) BibTeX
- Érika F. Cota, Luigi Carro, Marcelo Lubaszewski:
Reusing an on-chip network for the test of core-based systems.
471-499
Electronic Edition (ACM DL) BibTeX
- C. V. Krishna, Abhijit Jas, Nur A. Touba:
Achieving high encoding efficiency with partial dynamic LFSR reseeding.
500-516
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- William N. N. Hung, Xiaoyu Song, El Mostapha Aboulhamid, Andrew A. Kennings, Alan J. Coppola:
Segmented channel routability via satisfiability.
517-528
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Copyright © Sun May 17 00:29:44 2009
by Michael Ley (ley@uni-trier.de)