| 2004 |
|---|
| 8 | | Jayasree Dattagupta,
Nabanita Das:
Editorial.
Microprocessors and Microsystems 28(8): 401-402 (2004) |
| 1996 |
|---|
| 7 | | Nabanita Das,
Jayasree Dattagupta:
Two-Pass Rearrangeability in Faulty Benes Networks.
J. Parallel Distrib. Comput. 35(2): 191-198 (1996) |
| 1995 |
|---|
| 6 | EE | Nabanita Das,
Jayasree Dattagupta:
A fault location technique and alternate routing in Benes network.
Asian Test Symposium 1995: 71- |
| 1994 |
|---|
| 5 | | S. K. Basu,
Jayasree Dattagupta,
R. Dattagupta:
CCT: A New VLSI Architecture for Parallel Processing.
ICPADS 1994: 698-702 |
| 4 | | Nabanita Das,
Bhargab B. Bhattacharya,
Jayasree Dattagupta:
Hierarchical Classification of Permutation Classes in Multistage Interconnection Networks.
IEEE Trans. Computers 43(12): 1439-1444 (1994) |
| 1993 |
|---|
| 3 | | Nabanita Das,
Bhargab B. Bhattacharya,
Jayasree Dattagupta:
Isomorphism of Conflict Graphs in Multistage Interconnection Networks and Its Application to Optimal Routing.
IEEE Trans. Computers 42(6): 665-677 (1993) |
| 1992 |
|---|
| 2 | | Nabanita Das,
Krishnendu Mukhopadhyaya,
Jayasree Dattagupta:
A Versatile External Control Method for Self-Routable Permutations in Benes Network.
ICPP (1) 1992: 123-126 |
| 1991 |
|---|
| 1 | | Nabanita Das,
Krishnendu Mukhopadhyaya,
Jayasree Dattagupta:
On Self-Routable Permutations in Benes Network.
ICPP (1) 1991: 270-273 |
