Volume 4,
Number 1,
February 1993
- Vishwani D. Agrawal:
Editorial.
5
Electronic Edition (link) BibTeX
- Srinivas Devadas, Petra Michel:
Guest editorial.
7
Electronic Edition (link) BibTeX
- Gianpiero Cabodi, Paolo Camurati, Fulvio Corno, Paolo Prinetto, Matteo Sonza Reorda:
An approach to sequential circuit diagnosis based on formal verification techniques.
11-17
Electronic Edition (link) BibTeX
- Hyunwoo Cho, Seh-Woong Jeong, Fabio Somenzi, Carl Pixley:
Synchronizing sequences and symbolic traversal techniques in test generation.
19-31
Electronic Edition (link) BibTeX
- Margot Karam, Gabriele Saucier:
Functional versus random test generation for sequential circuits.
33-41
Electronic Edition (link) BibTeX
- Johannes Steensma, Werner Geurts, Francky Catthoor, Hugo De Man:
Testability analysis in high level data path synthesis.
43-56
Electronic Edition (link) BibTeX
- Srimat T. Chakradhar, Suman Kanjilal, Vishwani D. Agrawal:
Finite state machine synthesis with fault tolerant test function.
57-69
Electronic Edition (link) BibTeX
- Sen-Pin Lin, Charles Njinda, Melvin A. Breuer:
Generating a family of testable designs using the BILBO methodology.
71-89
Electronic Edition (link) BibTeX
- Srinivas Devadas, Kurt Keutzer, Sharad Malik:
A synthesis-based test generation and compaction algorithm for multifaults.
91-104
Electronic Edition (link) BibTeX
- Bernhard Eschermann:
Enhancing on-line testability during synthesis.
105-116
Electronic Edition (link) BibTeX
Volume 4,
Number 2,
May 1993
Volume 4,
Number 3,
August 1993
- Vishwani D. Agrawal:
Editorial.
199
Electronic Edition (link) BibTeX
- Charles E. Stroud, Ahmed E. Barbour:
Testability and test generation for majority voting fault-tolerant circuits.
201-214
Electronic Edition (link) BibTeX
- Chao Feng, Jon C. Muzio, Fabrizio Lombardi:
On the testability of array structures for FFT computation.
215-224
Electronic Edition (link) BibTeX
- Zaifu Zhang, Robert D. McLeod, Witold Pedrycz:
A neural network algorithm for testing stuck-open faults in CMOS combinational circuits.
225-235
Electronic Edition (link) BibTeX
- El Mostapha Aboulhamid, Younès Karkouri, Eduard Cerny:
On the generation of test patterns for multiple faults.
237-253
Electronic Edition (link) BibTeX
- Byung S. So, Charles R. Kime:
A fault simulation method: Parallel pattern critical path tracing.
255-265
Electronic Edition (link) BibTeX
- Egor S. Sogomonyan, Michael Gössel:
Design of self-testing and on-line fault detection combinational circuits with weakly independent outputs.
267-281
Electronic Edition (link) BibTeX
- Ye. L. Stolov:
Testing of multi-output circuits by means of signature analyzer.
283
Electronic Edition (link) BibTeX
- Soumitra Bose, Prathima Agrawal, Vishwani D. Agrawal:
The optimistic update theorem for path delay testing in sequential circuits.
285-290
Electronic Edition (link) BibTeX
Volume 4,
Number 4,
November 1993
Copyright © Sat May 16 23:58:50 2009
by Michael Ley (ley@uni-trier.de)
