Marisa López-Vallejo

2008
13	EE	Pedro Echeverría, David B. Thomas, Marisa López-Vallejo, Wayne Luk: An FPGA run-time parameterisable Log-Normal Random Number Generator. ARC 2008: 219-230
12	EE	Miguel Angel Sánchez, Pedro Echeverría, Francisco Mansilla, Marisa López-Vallejo: Designing Highly Parameterized Hardware using xHdl. FDL 2008: 78-83
11		Angel Fernandez Herrero, Ignacio Elguezábal, Marisa López-Vallejo: A Web-Based Environment Providing Remote Access To FPGA Platforms For Teaching Digital Hardware Design. e-Learning 2008: 161-165
10	EE	David Atienza, Praveen Raghavan, José Luis Ayala, Giovanni De Micheli, Francky Catthoor, Diederik Verkest, Marisa López-Vallejo: Joint hardware-software leakage minimization approach for the register file of VLIW embedded architectures. Integration 41(1): 38-48 (2008)
2007
9	EE	Pablo Ituero, Gorka Landaburu, Javier Del Ser, Marisa López-Vallejo, Pedro M. Crespo, Vicente Atxa, Jon Altuna: Joint Source-Channel Decoding ASIP Architecture for Sensor Networks. ICESS 2007: 98-108
8	EE	Praveen Raghavan, José L. Ayala, David Atienza, Francky Catthoor, Giovanni De Micheli, Marisa López-Vallejo: Reduction of Register File Delay Due to Process Variability in VLIW Embedded Processors. ISCAS 2007: 121-124
7	EE	Pablo Ituero, José L. Ayala, Marisa López-Vallejo: Leakage-based On-Chip Thermal Sensor for CMOS Technology. ISCAS 2007: 3327-3330
6	EE	José Luis Ayala, Anya Apavatjrut, David Atienza, Marisa López-Vallejo, Carlos A. López-Barrio: Thermal Characterization and Thermal Management in Processor-Based Systems. Power-aware Computing Systems 2007
5	EE	José L. Ayala, Marisa López-Vallejo, David Atienza, Praveen Raghavan, Francky Catthoor, Diederik Verkest: Energy-aware compilation and hardware design for VLIW embedded systems. IJES 3(1/2): 73-82 (2007)
2006
4	EE	Pablo Ituero, Marisa López-Vallejo: New Schemes in Clustered VLIW Processors Applied to Turbo Decoding. ASAP 2006: 291-296
3	EE	David Atienza, Praveen Raghavan, José L. Ayala, Giovanni De Micheli, Francky Catthoor, Diederik Verkest, Marisa López-Vallejo: Compiler-Driven Leakage Energy Reduction in Banked Register Files. PATMOS 2006: 107-116
2005
2	EE	José Luis Ayala, Marisa López-Vallejo: Compiler-Driven Power Optimizations in the Register File of Processor-Based Systems. Power-aware Computing Systems 2005
1	EE	José Luis Ayala, Marisa López-Vallejo: Integrating functional and power simulation in embedded systems design. J. Embedded Computing 1(3): 325-340 (2005)

Coauthor Index

1	Jon Altuna	[9]
2	Anya Apavatjrut	[6]
3	David Atienza	[3] [5] [6] [8] [10]
4	Vicente Atxa	[9]
5	José Luis Ayala (José L. Ayala)	[1] [2] [3] [5] [6] [7] [8] [10]
6	Francky Catthoor	[3] [5] [8] [10]
7	Pedro M. Crespo	[9]
8	Pedro Echeverría	[12] [13]
9	Ignacio Elguezábal	[11]
10	Angel Fernandez Herrero	[11]
11	Pablo Ituero	[4] [7] [9]
12	Gorka Landaburu	[9]
13	Carlos A. López-Barrio	[6]
14	Wayne Luk	[13]
15	Francisco Mansilla	[12]
16	Giovanni De Micheli	[3] [8] [10]
17	Praveen Raghavan	[3] [5] [8] [10]
18	Miguel Angel Sánchez	[12]
19	Javier Del Ser	[9]
20	David B. Thomas	[13]
21	Diederik Verkest	[3] [5] [10]

Colors in the list of coauthors