Volume 47,
Number 1,
April 2007
Special Issue:
Field Programmable Technology. Guest Editors:
Gordon Brebner,
Samarjit Chakraborty,
and Weng-Fai Wong
- Gordon J. Brebner, Samarjit Chakraborty, Weng-Fai Wong:
Editorial for the Special Issue on Field Programmable Technology.
1-2
Electronic Edition (link) BibTeX
- Jeffrey M. Arnold:
The Architecture and Development Flow of the S5 Software Configurable Processor.
3-14
Electronic Edition (link) BibTeX
- Mateusz Majer, Jürgen Teich, Ali Ahmadinia, Christophe Bobda:
The Erlangen Slot Machine: A Dynamically Reconfigurable FPGA-based Computer.
15-31
Electronic Edition (link) BibTeX
- José Gabriel F. Coutinho, M. P. T. Juvonen, J. L. Wang, B. L. Lo, Wayne Luk, Oskar Mencer, G. Z. Yang:
Designing a Posture Analysis System with Hardware Implementation.
33-45
Electronic Edition (link) BibTeX
- Máire McLoone, Ciaran McIvor:
High-speed & Low Area Hardware Architectures of the Whirlpool Hash Function.
47-57
Electronic Edition (link) BibTeX
- Marcio Juliato, Guido Araujo, Julio López, Ricardo Dahab:
A Custom Instruction Approach for Hardware and Software Implementations of Finite Field Arithmetic over F2163 using Gaussian Normal Bases.
59-76
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- David B. Thomas, Wayne Luk:
High Quality Uniform Random Number Generation Using LUT Optimised State-transition Matrices.
77-92
Electronic Edition (link) BibTeX
Volume 47,
Number 2,
May 2007
- Roman C. Kordasiewicz, Shahram Shirani:
On Hardware Implementations Of DCT and Quantization Blocks for H.264/AVC.
93-102
Electronic Edition (link) BibTeX
- Albert M. K. Cheng, Zhubin Zhang:
Improving Web Server Performance with Adaptive Proxy Caching in Soft Real-time Mobile Applications.
103-115
Electronic Edition (link) BibTeX
- H. Jeong, Y. Kim:
A Systolic Architecture and Implementation of Feedback Network for Blind Source Separation.
117-126
Electronic Edition (link) BibTeX
- Andrew Kinane, Noel E. O'Connor:
Energy-efficient Hardware Accelerators for the SA-DCT and Its Inverse.
127-152
Electronic Edition (link) BibTeX
- Chun Xue, Zili Shao, Edwin Hsing-Mean Sha:
Maximize Parallelism Minimize Overhead for Nested Loops via Loop Striping.
153-167
Electronic Edition (link) BibTeX
- Albert Mo Kim Cheng, Feng Shang:
Priority-driven Coding and Transmission of Progressive JPEG Images for Real-Time Applications.
169-182
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- T. Sansaloni, A. Perez-Pascual, V. Torres, Javier Valls:
Scheme for Reducing the Storage Requirements of FFT Twiddle Factors on FPGAs.
183-187
Electronic Edition (link) BibTeX
Volume 47,
Number 3,
June 2007
- Roman C. Kordasiewicz, Shahram Shirani:
On Hardware Implementations Of DCT and Quantization Blocks for H.264/AVC.
189-199
Electronic Edition (link) BibTeX
- Sze-Wei Lee, Soon-Chieh Lim:
An Enhanced Memory Address Mapping Scheme for Improved Memory Access Performance of 2-D DWT Processing Systems.
201-221
Electronic Edition (link) BibTeX
- Wei Han, Kwok-Wai Hon, Cheong-fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun:
A Speech Recognition IC Using Hidden Markov Models with Continuous Observation Densities.
223-232
Electronic Edition (link) BibTeX
- Jun-Hee Mun, Shung Han Cho, Sangjin Hong:
Flexible Controller Design and Its Application for Concurrent Execution of Buffer Centric Dataflows.
233-257
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- Messaoud Ahmed-Ouameur, Daniel Massicotte:
Real-time DSP and FPGA Implementation of Wiener LMS Based Multipath Channel Estimation in 3G CDMA Systems.
259-279
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- Yi-Hsuan Lee, Cheng Chen:
An Efficient Code Generation Algorithm for Non-orthogonal DSP Architecture.
281-296
Electronic Edition (link) BibTeX
- Mame Maria Mbaye, Normand Bélanger, Yvon Savaria, Samuel Pierre:
A Novel Application-specific Instruction-set Processor Design Approach for Video Processing Acceleration.
297-315
Electronic Edition (link) BibTeX
Copyright © Sun May 17 00:31:44 2009
by Michael Ley (ley@uni-trier.de)
