2009 |
20 | EE | Dong-U Lee,
John D. Villasenor:
Optimized Custom Precision Function Evaluation for Embedded Processors.
IEEE Trans. Computers 58(1): 46-59 (2009) |
2008 |
19 | EE | Hyungjin Kim,
Dong-U Lee,
John D. Villasenor:
Design Tradeoffs and Hardware Architecture for Real-Time Iterative MIMO Detection using Sphere Decoding and LDPC Coding.
IEEE Journal on Selected Areas in Communications 26(6): 1003-1014 (2008) |
18 | EE | Dong-U Lee,
Ray C. C. Cheung,
Wayne Luk,
John D. Villasenor:
Hardware Implementation Trade-Offs of Polynomial Approximations and Interpolations.
IEEE Trans. Computers 57(5): 686-701 (2008) |
2007 |
17 | EE | Dong-U Lee,
Hyungjin Kim,
Steven Tu,
Mohammad H. Rahimi,
Deborah Estrin,
John D. Villasenor:
Energy-optimized image communication on resource-constrained sensor platforms.
IPSN 2007: 216-225 |
16 | EE | Dong-U Lee,
John D. Villasenor:
A Bit-Width Optimization Methodology for Polynomial-Based Function Evaluation.
IEEE Trans. Computers 56(4): 567-571 (2007) |
15 | EE | Dong-U Lee,
Ray C. C. Cheung,
John D. Villasenor:
A Flexible Architecture for Precise Gamma Correction.
IEEE Trans. VLSI Syst. 15(4): 474-478 (2007) |
14 | EE | Ray C. C. Cheung,
Dong-U Lee,
Wayne Luk,
John D. Villasenor:
Hardware Generation of Arbitrary Random Number Distributions From Uniform Distributions Via the Inversion Method.
IEEE Trans. VLSI Syst. 15(8): 952-962 (2007) |
2006 |
13 | EE | Dong-U Lee,
John D. Villasenor,
Wayne Luk,
Philip Heng Wai Leong:
A Hardware Gaussian Noise Generator Using the Box-Muller Method and Its Error Analysis.
IEEE Trans. Computers 55(6): 659-671 (2006) |
12 | EE | Dong-U Lee,
Altaf Abdul Gaffar,
Ray C. C. Cheung,
Oskar Mencer,
Wayne Luk,
George A. Constantinides:
Accuracy-Guaranteed Bit-Width Optimization.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(10): 1990-2000 (2006) |
2005 |
11 | EE | Ray C. C. Cheung,
Dong-U Lee,
Oskar Mencer,
Wayne Luk,
Peter Y. K. Cheung:
Automating custom-precision function evaluation for embedded processors.
CASES 2005: 22-31 |
10 | EE | Dong-U Lee,
Altaf Abdul Gaffar,
Oskar Mencer,
Wayne Luk:
MiniBit: bit-width optimization via affine arithmetic.
DAC 2005: 837-840 |
9 | | Guanglie Zhang,
Philip Heng Wai Leong,
Dong-U Lee,
John D. Villasenor,
Ray C. C. Cheung,
Wayne Luk:
Ziggurat-based Hardware Gaussian Random Number Generator.
FPL 2005: 275-280 |
8 | | G. L. Zhang,
Philip Heng Wai Leong,
Chun Hok Ho,
Kuen Hung Tsoi,
Chris C. C. Cheung,
Dong-U Lee,
Ray C. C. Cheung,
Wayne Luk:
Reconfigurable Acceleration for Monte Carlo Based Financial Simulation.
FPT 2005: 215-222 |
7 | EE | Dong-U Lee,
Altaf Abdul Gaffar,
Oskar Mencer,
Wayne Luk:
Optimizing Hardware Function Evaluation.
IEEE Trans. Computers 54(12): 1520-1531 (2005) |
6 | EE | Dong-U Lee,
Wayne Luk,
John D. Villasenor,
Guanglie Zhang,
Philip Heng Wai Leong:
A hardware Gaussian noise generator using the Wallace method.
IEEE Trans. VLSI Syst. 13(8): 911-920 (2005) |
2004 |
5 | EE | Dong-U Lee,
Wayne Luk,
Connie Wang,
Christopher Jones,
Michael Smith,
John D. Villasenor:
A Flexible Hardware Encoder for Low-Density Parity-Check Codes.
FCCM 2004: 101-111 |
4 | EE | Dong-U Lee,
Oskar Mencer,
David J. Pearce,
Wayne Luk:
Automating Optimized Table-with-Polynomial Function Evaluation for FPGAs.
FPL 2004: 364-373 |
3 | EE | Dong-U Lee,
Wayne Luk,
John D. Villasenor,
Peter Y. K. Cheung:
A Gaussian Noise Generator for Hardware-Based Simulations.
IEEE Trans. Computers 53(12): 1523-1534 (2004) |
2003 |
2 | EE | Dong-U Lee,
Wayne Luk,
John D. Villasenor,
Peter Y. K. Cheung:
A Hardware Gaussian Noise Generator for Channel Code Evaluation.
FCCM 2003: 69- |
1 | EE | Dong-U Lee,
Wayne Luk,
John D. Villasenor,
Peter Y. K. Cheung:
Non-uniform Segmentation for Hardware Function Evaluation.
FPL 2003: 796-807 |