1. NOCS 2007:
Princeton,
New Jersey,
USA
First International Symposium on Networks-on-Chips, NOCS 2007, 7-9 May 2007, Princeton, New Jersey, USA, Proceedings.
IEEE Computer Society 2007, ISBN 978-0-7695-2773-4 BibTeX
Keynote 1
NoC Design Case Studies
- Paul Gratz, Karthikeyan Sankaralingam, Heather Hanson, Premkishore Shivakumar, Robert G. McDonald, Stephen W. Keckler, Doug Burger:
Implementation and Evaluation of a Dynamically Routed Processor Operand Network.
7-17
Electronic Edition (link) BibTeX
- Thomas William Ainsworth, Timothy Mark Pinkston:
On Characterizing Performance of the Cell Broadband Engine Element Interconnect Bus.
18-29
Electronic Edition (link) BibTeX
- Donghyun Kim, Kwanho Kim, Joo-Young Kim, Seung-Jin Lee, Hoi-Jun Yoo:
Solutions for Real Chip Implementation Issues of NoC and Their Application to Memory-Centric NoC.
30-39
Electronic Edition (link) BibTeX
- Jeffrey D. Hoffman, David Arditti Ilitzky, Anthony Chun, Aliaksei Chapyzhenka:
Architecture of the Scalable Communications Core.
40-52
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Technology and Circuit Technologies
System Architecture,
Verification and Debug
- Kees Goossens, Bart Vermeulen, Remco van Steeden, Martijn T. Bennebroek:
Transaction-Based Communication-Centric Debug.
95-106
Electronic Edition (link) BibTeX
- Théodore Marescaux, Erik Brockmeyer, Henk Corporaal:
The Impact of Higher Communication Layers on NoC Supported MP-SoCs.
107-116
Electronic Edition (link) BibTeX
- Evgeny Bolotin, Zvika Guz, Israel Cidon, Ran Ginosar, Avinoam Kolodny:
The Power of Priority: NoC Based Distributed Cache Coherency.
117-126
Electronic Edition (link) BibTeX
- Dominique Borrione, Amr Helmy, Laurence V. Pierre, Julien Schmaltz:
A Generic Model for Formally Verifying NoC Communication Architectures: A Case Study.
127-136
Electronic Edition (link) BibTeX
- Isask'har Walter, Israel Cidon, Ran Ginosar, Avinoam Kolodny:
Access Regulation to Hot-Modules in Wormhole NoCs.
137-148
Electronic Edition (link) BibTeX
Keynote 2
Routing and Topology
- George Michelogiannakis, Dionisios N. Pnevmatikatos, Manolis Katevenis:
Approaching Ideal NoC Latency with Pre-Configured Routes.
153-162
Electronic Edition (link) BibTeX
- Arnab Banerjee, Robert D. Mullins, Simon W. Moore:
A Power and Energy Exploration of Network-on-Chip Architectures.
163-172
Electronic Edition (link) BibTeX
- Terrence S. T. Mak, N. Pete Sedcole, Peter Y. K. Cheung, Wayne Luk, K. P. Lam:
A Hybrid Analog-Digital Routing Network for NoC Dynamic Routing.
173-182
Electronic Edition (link) BibTeX
- Jose Flich, Andres Mejia, Pedro López, José Duato:
Region-Based Routing: An Efficient Routing Mechanism to Tackle Unreliable Hardware in Network on Chips.
183-194
Electronic Edition (link) BibTeX
- Stephan Bourduas, Zeljko Zilic:
A Hybrid Ring/Mesh Interconnect for Network-on-Chip Using Hierarchical Rings for Global Routing.
195-204
Electronic Edition (link) BibTeX
Panel
Posters
- Per Badlund, Axel Jantsch:
An Analytical Approach for Dimensioning Mixed Traffic Networks.
215
Electronic Edition (link) BibTeX
- Xuan-Tu Tran, Jean Durupt, Yvain Thonnart, François Bertrand, Vincent Beroulle, Chantal Robach:
Implementation of a Design-for-Test Architecture for Asynchronous Networks-on-Chip.
216
Electronic Edition (link) BibTeX
- Mikael Millberg, Axel Jantsch:
A Study of NoC Exit Strategies.
217
Electronic Edition (link) BibTeX
- Rostislav (Reuven) Dobkin, Ran Ginosar, Israel Cidon:
QNoC Asynchronous Router with Dynamic Virtual Channel Allocation.
218
Electronic Edition (link) BibTeX
- Simon Ogg, Enrico Valli, Crescenzo D'Alessandro, Alexandre Yakovlev, Bashir M. Al-Hashimi, Luca Benini:
Reducing Interconnect Cost in NoC through Serialized Asynchronous Links.
219
Electronic Edition (link) BibTeX
- Sheng Xu, Ibis Benito, Wayne P. Burleson:
Thermal Impacts on NoC Interconnects.
220
Electronic Edition (link) BibTeX
Reconfigurable NoCs
- Jean-Philippe Diguet, Samuel Evain, Romain Vaslin, Guy Gogniat, Emmanuel Juin:
NOC-centric Security of Reconfigurable SoC.
223-232
Electronic Edition (link) BibTeX
- Andreas Hansson, Kees Goossens:
Trade-offs in the Configuration of a Network on Chip for Multiple Use-Cases.
233-242
Electronic Edition (link) BibTeX
- Zied Marrakchi, Hayder Mrabet, Christian Masson, Habib Mehrez:
Mesh of Tree: Unifying Mesh and MFPGA for Better Device Performances.
243-252
Electronic Edition (link) BibTeX
- Roman Gindin, Israel Cidon, Idit Keidar:
NoC-Based FPGA: Architecture and Routing.
253-264
Electronic Edition (link) BibTeX
Dinner Speaker
Keynote 3
CAD and Methodology for NoCs
- Antonio Pullini, Federico Angiolini, Paolo Meloni, David Atienza, Srinivasan Murali, Luigi Raffo, Giovanni De Micheli, Luca Benini:
NoC Design and Implementation in 65nm Technology.
273-282
Electronic Edition (link) BibTeX
- Daniel Greenfield, Arnab Banerjee, Jeong-Gun Lee, Simon W. Moore:
Implications of Rent's Rule for NoC Design and Its Fault-Tolerance.
283-294
Electronic Edition (link) BibTeX
- Cedric Koch-Hofer, Marc Renaudin, Yvain Thonnart, Pascal Vivet:
ASC, a SystemC Extension for Modeling Asynchronous Systems, and Its Application to an Asynchronous NoC.
295-306
Electronic Edition (link) BibTeX
NoC Mapping and Simulation
Copyright © Sat May 16 23:31:35 2009
by Michael Ley (ley@uni-trier.de)