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Yahya Zaidan

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2002
4EEYu Huang, Sudhakar M. Reddy, Wu-Tung Cheng, Paul Reuter, Nilanjan Mukherjee, Chien-Chung Tsai, Omer Samman, Yahya Zaidan: Optimal Core Wrapper Width Selection and SOC Test Scheduling Based on 3-D Bin Packing Algorithm. ITC 2002: 74-82
3EEYu Huang, Nilanjan Mukherjee, Chien-Chung Tsai, Omer Samman, Yahya Zaidan, Yanping Zhang, Wu-Tung Cheng, Sudhakar M. Reddy: Constraint Driven Pin Mapping for Concurrent SOC Testing. VLSI Design 2002: 511-516
2EEYu Huang, Wu-Tung Cheng, Chien-Chung Tsai, Nilanjan Mukherjee, Omer Samman, Yahya Zaidan, Sudhakar M. Reddy: On Concurrent Test of Core-Based SOC Design. J. Electronic Testing 18(4-5): 401-414 (2002)
2001
1EEYu Huang, Wu-Tung Cheng, Chien-Chung Tsai, Nilanjan Mukherjee, Omer Samman, Yahya Zaidan, Sudhakar M. Reddy: Resource Allocation and Test Scheduling for Concurrent Test of Core-Based SoC D. Asian Test Symposium 2001: 265-

Coauthor Index

1Wu-Tung Cheng [1] [2] [3] [4]
2Yu Huang [1] [2] [3] [4]
3Nilanjan Mukherjee [1] [2] [3] [4]
4Sudhakar M. Reddy [1] [2] [3] [4]
5Paul Reuter [4]
6Omer Samman [1] [2] [3] [4]
7Chien-Chung Tsai [1] [2] [3] [4]
8Yanping Zhang [3]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)