| 2007 |
|---|
| 5 | EE | Chris Schuermyer,
Jewel Pangilinan,
Jay Jahangiri,
Martin Keim,
Janusz Rajski,
Brady Benware:
Silicon Evaluation of Static Alternative Fault Models.
VTS 2007: 265-270 |
| 2006 |
|---|
| 4 | EE | Ron Press,
Jay Jahangiri:
The Demand and Practical Approach for 100x Test Compression.
VLSI-SoC 2006: 245-250 |
| 2005 |
|---|
| 3 | EE | Jay Jahangiri,
Nilanjan Mukherjee,
Wu-Tung Cheng,
Subramanian Mahadevan,
Ron Press:
Achieving High Test Quality with Reduced Pin Count Testing.
Asian Test Symposium 2005: 312-317 |
| 2 | EE | Jay Jahangiri,
David Abercrombie:
Meeting Nanometer DPM Requirements Through DFT.
ISQED 2005: 276-282 |
| 1 | EE | Jay Jahangiri,
David Abercrombie:
Value-Added Defect Testing Techniques.
IEEE Design & Test of Computers 22(3): 224-231 (2005) |
