| |
| 1989 | ||
|---|---|---|
| 3 | EE | W.-J. Lue, Lawrence P. McNamee: Extracting Schematic-like Information from CMOS Circuit Net-lists. DAC 1989: 690-693 |
| 2 | EE | W.-J. Lue, L. D. McNamee: VLSI leaf cell design by understanding circuit structures. IEA/AIE (1) 1989: 500-508 |
| 1987 | ||
| 1 | EE | W.-J. Lue, Lawrence P. McNamee: PLAY: Pattern-Based Symbolic Cell Layout: Part I: Transistor Placement. DAC 1987: 659-665 |
| 1 | L. D. McNamee | [2] |
| 2 | Lawrence P. McNamee | [1] [3] |