| |
| 1988 | ||
|---|---|---|
| 3 | EE | Magdy S. Abadir, Jack Ferguson, Tom E. Kirkland: Logic design verification via test generation. IEEE Trans. on CAD of Integrated Circuits and Systems 7(1): 138-148 (1988) |
| 1987 | ||
| 2 | EE | Tom E. Kirkland, M. Ray Mercer: A Topological Search Algorithm for ATPG. DAC 1987: 502-508 |
| 1986 | ||
| 1 | Tom E. Kirkland, M. Ray Mercer: A Two-Level Guidance Heuristic for ATPG. FJCC 1986: 841-846 | |
| 1 | Magdy S. Abadir | [3] |
| 2 | Jack Ferguson | [3] |
| 3 | M. Ray Mercer | [1] [2] |