M. C. Chi

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2007

2 EE J. C. Chi, H. H. Lee, S. H. Tsai, M. C. Chi: Gate Level Multiple Supply Voltage Assignment Algorithm for Power Optimization Under Timing Constraint. IEEE Trans. VLSI Syst. 15(6): 637-648 (2007)

1987

1 EE M. C. Chi: An Automatic Rectilinear Partitioning Procedure for Standard Cells. DAC 1987: 50-55

2007
2	EE	J. C. Chi, H. H. Lee, S. H. Tsai, M. C. Chi: Gate Level Multiple Supply Voltage Assignment Algorithm for Power Optimization Under Timing Constraint. IEEE Trans. VLSI Syst. 15(6): 637-648 (2007)
1987
1	EE	M. C. Chi: An Automatic Rectilinear Partitioning Procedure for Standard Cells. DAC 1987: 50-55

Coauthor Index

1 J. C. Chi [2]

2 H. H. Lee [2]

3 S. H. Tsai [2]