| |
| 1987 | ||
|---|---|---|
| 3 | EE | Kye S. Hedlund: Aesop: A Tool for Automated Transistor Sizing. DAC 1987: 114-120 |
| 1985 | ||
| 2 | EE | Kye S. Hedlund: Electrical optimization of PLAs. DAC 1985: 681-687 |
| 1982 | ||
| 1 | Kye S. Hedlund, Lawrence Snyder: Wafer scale integration of Configurable, Highly Parallel (CHiP) processors. ICPP 1982: 262-264 | |
| 1 | Lawrence Snyder (Larry Snyder) | [1] |